Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xx

4 files changed, 122 insertions, 47 deletions

diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c
index adf8083010..e634f0a25b 100644
--- a/cpu/mpc83xx/cpu.c
+++ b/cpu/mpc83xx/cpu.c
@@ -35,12 +35,10 @@
 #include <ft_build.h>
 #elif defined(CONFIG_OF_LIBFDT)
 #include <libfdt.h>
-#include <libfdt_env.h>
 #endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
-
 int checkcpu(void)
 {
 	volatile immap_t *immr;
@@ -333,9 +331,7 @@ void watchdog_reset (void)
  */
 static int fdt_set_eth0(void *blob, int nodeoffset, const char *name, bd_t *bd)
 {
-	/*
-	 * Fix it up if it exists, don't create it if it doesn't exist.
-	 */
+	/* Fix it up if it exists, don't create it if it doesn't exist */
 	if (fdt_get_property(blob, nodeoffset, name, 0)) {
 		return fdt_setprop(blob, nodeoffset, name, bd->bi_enetaddr, 6);
 	}
@@ -345,9 +341,7 @@ static int fdt_set_eth0(void *blob, int nodeoffset, const char *name, bd_t *bd)
 /* second onboard ethernet port */
 static int fdt_set_eth1(void *blob, int nodeoffset, const char *name, bd_t *bd)
 {
-	/*
-	 * Fix it up if it exists, don't create it if it doesn't exist.
-	 */
+	/* Fix it up if it exists, don't create it if it doesn't exist */
 	if (fdt_get_property(blob, nodeoffset, name, 0)) {
 		return fdt_setprop(blob, nodeoffset, name, bd->bi_enet1addr, 6);
 	}
@@ -358,9 +352,7 @@ static int fdt_set_eth1(void *blob, int nodeoffset, const char *name, bd_t *bd)
 /* third onboard ethernet port */
 static int fdt_set_eth2(void *blob, int nodeoffset, const char *name, bd_t *bd)
 {
-	/*
-	 * Fix it up if it exists, don't create it if it doesn't exist.
-	 */
+	/* Fix it up if it exists, don't create it if it doesn't exist */
 	if (fdt_get_property(blob, nodeoffset, name, 0)) {
 		return fdt_setprop(blob, nodeoffset, name, bd->bi_enet2addr, 6);
 	}
@@ -371,9 +363,7 @@ static int fdt_set_eth2(void *blob, int nodeoffset, const char *name, bd_t *bd)
 /* fourth onboard ethernet port */
 static int fdt_set_eth3(void *blob, int nodeoffset, const char *name, bd_t *bd)
 {
-	/*
-	 * Fix it up if it exists, don't create it if it doesn't exist.
-	 */
+	/* Fix it up if it exists, don't create it if it doesn't exist */
 	if (fdt_get_property(blob, nodeoffset, name, 0)) {
 		return fdt_setprop(blob, nodeoffset, name, bd->bi_enet3addr, 6);
 	}
@@ -384,9 +374,7 @@ static int fdt_set_eth3(void *blob, int nodeoffset, const char *name, bd_t *bd)
 static int fdt_set_busfreq(void *blob, int nodeoffset, const char *name, bd_t *bd)
 {
 	u32  tmp;
-	/*
-	 * Create or update the property.
-	 */
+	/* Create or update the property */
 	tmp = cpu_to_be32(bd->bi_busfreq);
 	return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp));
 }
@@ -394,14 +382,38 @@ static int fdt_set_busfreq(void *blob, int nodeoffset, const char *name, bd_t *b
 static int fdt_set_tbfreq(void *blob, int nodeoffset, const char *name, bd_t *bd)
 {
 	u32  tmp;
-	/*
-	 * Create or update the property.
-	 */
+	/* Create or update the property */
 	tmp = cpu_to_be32(OF_TBCLK);
 	return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp));
 }
 
 
+static int fdt_set_clockfreq(void *blob, int nodeoffset, const char *name, bd_t *bd)
+{
+	u32  tmp;
+	/* Create or update the property */
+	tmp = cpu_to_be32(gd->core_clk);
+	return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+#ifdef CONFIG_QE
+static int fdt_set_qe_busfreq(void *blob, int nodeoffset, const char *name, bd_t *bd)
+{
+	u32  tmp;
+	/* Create or update the property */
+	tmp = cpu_to_be32(gd->qe_clk);
+	return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+static int fdt_set_qe_brgfreq(void *blob, int nodeoffset, const char *name, bd_t *bd)
+{
+	u32  tmp;
+	/* Create or update the property */
+	tmp = cpu_to_be32(gd->brg_clk);
+	return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp));
+}
+#endif
+
 /*
  * Fixups to the fdt.
  */
@@ -420,6 +432,10 @@ static const struct {
 	},
 	{	"/cpus/" OF_CPU,
 		"clock-frequency",
+		fdt_set_clockfreq
+	},
+	{	"/" OF_SOC,
+		"bus-frequency",
 		fdt_set_busfreq
 	},
 	{	"/" OF_SOC "/serial@4500",
@@ -450,6 +466,15 @@ static const struct {
 		fdt_set_eth1
 	},
 #endif
+#ifdef CONFIG_QE
+	{	"/" OF_QE,
+		"brg-frequency",
+		fdt_set_qe_brgfreq
+	},
+	{	"/" OF_QE,
+		"bus-frequency",
+		fdt_set_qe_busfreq
+	},
 #ifdef CONFIG_UEC_ETH1
 #if CFG_UEC1_UCC_NUM == 0  /* UCC1 */
 	{	"/" OF_QE "/ucc@2000",
@@ -481,7 +506,7 @@ static const struct {
 		"local-mac-address",
 		fdt_set_eth1
 	},
-#elif CFG_UEC1_UCC_NUM == 3  /* UCC4 */
+#elif CFG_UEC2_UCC_NUM == 3  /* UCC4 */
 	{	"/" OF_QE "/ucc@3200",
 		"mac-address",
 		fdt_set_eth1
@@ -492,14 +517,16 @@ static const struct {
 	},
 #endif
 #endif /* CONFIG_UEC_ETH2 */
+#endif /* CONFIG_QE */
 };
 
 void
 ft_cpu_setup(void *blob, bd_t *bd)
 {
-	int  nodeoffset;
-	int  err;
-	int  j;
+	int nodeoffset;
+	int err;
+	int j;
+	int tmp[2];
 
 	for (j = 0; j < (sizeof(fixup_props) / sizeof(fixup_props[0])); j++) {
 		nodeoffset = fdt_find_node_by_path(blob, fixup_props[j].node);
@@ -508,15 +535,29 @@ ft_cpu_setup(void *blob, bd_t *bd)
 						    fixup_props[j].prop, bd);
 			if (err < 0)
 				debug("Problem setting %s = %s: %s\n",
-					fixup_props[j].node,
-					fixup_props[j].prop,
-					fdt_strerror(err));
+				      fixup_props[j].node, fixup_props[j].prop,
+				      fdt_strerror(err));
 		} else {
 			debug("Couldn't find %s: %s\n",
-				fixup_props[j].node,
-				fdt_strerror(nodeoffset));
+			      fixup_props[j].node, fdt_strerror(nodeoffset));
 		}
 	}
+
+	/* update, or add and update /memory node */
+	nodeoffset = fdt_find_node_by_path(blob, "/memory");
+	if (nodeoffset < 0) {
+		nodeoffset = fdt_add_subnode(blob, 0, "memory");
+		if (nodeoffset < 0)
+			debug("failed to add /memory node: %s\n",
+			      fdt_strerror(nodeoffset));
+	}
+	if (nodeoffset >= 0) {
+		fdt_setprop(blob, nodeoffset, "device_type",
+			    "memory", sizeof("memory"));
+		tmp[0] = cpu_to_be32(bd->bi_memstart);
+		tmp[1] = cpu_to_be32(bd->bi_memsize);
+		fdt_setprop(blob, nodeoffset, "reg", tmp, sizeof(tmp));
+	}
 }
 #elif defined(CONFIG_OF_FLAT_TREE)
 void
diff --git a/cpu/mpc83xx/pci.c b/cpu/mpc83xx/pci.c
index 2298218870..5675afe971 100644
--- a/cpu/mpc83xx/pci.c
+++ b/cpu/mpc83xx/pci.c
@@ -28,7 +28,6 @@
 
 #if defined(CONFIG_OF_LIBFDT)
 #include <libfdt.h>
-#include <libfdt_env.h>
 #elif defined(CONFIG_OF_FLAT_TREE)
 #include <ft_build.h>
 #endif
@@ -184,7 +183,12 @@ void ft_pci_setup(void *blob, bd_t *bd)
 	if (nodeoffset >= 0) {
 		tmp[0] = cpu_to_be32(pci_hose[0].first_busno);
 		tmp[1] = cpu_to_be32(pci_hose[0].last_busno);
-		err = fdt_setprop(blob, nodeoffset, "bus-range", tmp, sizeof(tmp));
+		err = fdt_setprop(blob, nodeoffset, "bus-range",
+				  tmp, sizeof(tmp));
+
+		tmp[0] = cpu_to_be32(gd->pci_clk);
+		err = fdt_setprop(blob, nodeoffset, "clock-frequency",
+				  tmp, sizeof(tmp[0]));
 	}
 
 	if (pci_num_buses < 2)
@@ -194,7 +198,12 @@ void ft_pci_setup(void *blob, bd_t *bd)
 	if (nodeoffset >= 0) {
 		tmp[0] = cpu_to_be32(pci_hose[0].first_busno);
 		tmp[1] = cpu_to_be32(pci_hose[0].last_busno);
-		err = fdt_setprop(blob, nodeoffset, "bus-range", tmp, sizeof(tmp));
+		err = fdt_setprop(blob, nodeoffset, "bus-range",
+				  tmp, sizeof(tmp));
+
+		tmp[0] = cpu_to_be32(gd->pci_clk);
+		err = fdt_setprop(blob, nodeoffset, "clock-frequency",
+				  tmp, sizeof(tmp[0]));
 	}
 }
 #elif CONFIG_OF_FLAT_TREE
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index 54f0c83d45..ee2d0385e4 100644
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -34,6 +34,30 @@
 #include <asm/mmu.h>
 #include <spd_sdram.h>
 
+void board_add_ram_info(int use_default)
+{
+	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile ddr83xx_t *ddr = &immap->ddr;
+
+	printf(" (DDR%d", ((ddr->sdram_cfg & SDRAM_CFG_SDRAM_TYPE_MASK)
+			   >> SDRAM_CFG_SDRAM_TYPE_SHIFT) - 1);
+
+	if (ddr->sdram_cfg & SDRAM_CFG_32_BE)
+		puts(", 32-bit");
+	else
+		puts(", 64-bit");
+
+	if (ddr->sdram_cfg & SDRAM_CFG_ECC_EN)
+		puts(", ECC on)");
+	else
+		puts(", ECC off)");
+
+#if defined(CFG_LB_SDRAM) && defined(CFG_LBC_SDRAM_SIZE)
+	puts("\nSDRAM: ");
+	print_size (CFG_LBC_SDRAM_SIZE * 1024 * 1024, " (local bus)");
+#endif
+}
+
 #ifdef CONFIG_SPD_EEPROM
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -109,7 +133,7 @@ long int spd_sdram()
 	unsigned int n_ranks;
 	unsigned int odt_rd_cfg, odt_wr_cfg;
 	unsigned char twr_clk, twtr_clk;
-	unsigned char sdram_type;
+	unsigned int sdram_type;
 	unsigned int memsize;
 	unsigned int law_size;
 	unsigned char caslat, caslat_ctrl;
@@ -137,7 +161,7 @@ long int spd_sdram()
 #endif
 	/* Check the memory type */
 	if (spd.mem_type != SPD_MEMTYPE_DDR && spd.mem_type != SPD_MEMTYPE_DDR2) {
-		printf("DDR: Module mem type is %02X\n", spd.mem_type);
+		debug("DDR: Module mem type is %02X\n", spd.mem_type);
 		return 0;
 	}
 
@@ -578,17 +602,17 @@ long int spd_sdram()
 			burstlen = 0x03; /* 32 bit data bus, burst len is 8 */
 		else
 			burstlen = 0x02; /* 32 bit data bus, burst len is 4 */
-		printf("\n   DDR DIMM: data bus width is 32 bit");
+		debug("\n   DDR DIMM: data bus width is 32 bit");
 	} else {
 		burstlen = 0x02; /* Others act as 64 bit bus, burst len is 4 */
-		printf("\n   DDR DIMM: data bus width is 64 bit");
+		debug("\n   DDR DIMM: data bus width is 64 bit");
 	}
 
 	/* Is this an ECC DDR chip? */
 	if (spd.config == 0x02)
-		printf(" with ECC\n");
+		debug(" with ECC\n");
 	else
-		printf(" without ECC\n");
+		debug(" without ECC\n");
 
 	/* Burst length is always 4 for 64 bit data bus, 8 for 32 bit data bus,
 	   Burst type is sequential
@@ -718,26 +742,26 @@ long int spd_sdram()
 	 * sdram_cfg[13] = 0 (8_BE =0, 4-beat bursts)
 	 */
 	if (spd.mem_type == SPD_MEMTYPE_DDR)
-		sdram_type = 2;
+		sdram_type = SDRAM_CFG_SDRAM_TYPE_DDR1;
 	else
-		sdram_type = 3;
+		sdram_type = SDRAM_CFG_SDRAM_TYPE_DDR2;
 
 	sdram_cfg = (0
-		     | (1 << 31)			/* DDR enable */
-		     | (1 << 30)			/* Self refresh */
-		     | (sdram_type << 24)		/* SDRAM type */
+		     | SDRAM_CFG_MEM_EN		/* DDR enable */
+		     | SDRAM_CFG_SREN		/* Self refresh */
+		     | sdram_type		/* SDRAM type */
 		     );
 
 	/* sdram_cfg[3] = RD_EN - registered DIMM enable */
 	if (spd.mod_attr & 0x02)
-		sdram_cfg |= 0x10000000;
+		sdram_cfg |= SDRAM_CFG_RD_EN;
 
 	/* The DIMM is 32bit width */
 	if (spd.dataw_lsb == 0x20) {
 		if (spd.mem_type == SPD_MEMTYPE_DDR)
-			sdram_cfg |= 0x000C0000;
+			sdram_cfg |= SDRAM_CFG_32_BE | SDRAM_CFG_8_BE;
 		if (spd.mem_type == SPD_MEMTYPE_DDR2)
-			sdram_cfg |= 0x00080000;
+			sdram_cfg |= SDRAM_CFG_32_BE;
 	}
 
 	ddrc_ecc_enable = 0;
@@ -758,7 +782,7 @@ long int spd_sdram()
 	debug("DDR:err_disable=0x%08x\n", ddr->err_disable);
 	debug("DDR:err_sbe=0x%08x\n", ddr->err_sbe);
 #endif
-	printf("   DDRC ECC mode: %s\n", ddrc_ecc_enable ? "ON":"OFF");
+	debug("   DDRC ECC mode: %s\n", ddrc_ecc_enable ? "ON":"OFF");
 
 #if defined(CONFIG_DDR_2T_TIMING)
 	/*
diff --git a/cpu/mpc83xx/speed.c b/cpu/mpc83xx/speed.c
index bf30616548..cba57fadb9 100644
--- a/cpu/mpc83xx/speed.c
+++ b/cpu/mpc83xx/speed.c
@@ -351,6 +351,7 @@ int get_clocks(void)
 	gd->qe_clk = qe_clk;
 	gd->brg_clk = brg_clk;
 #endif
+	gd->pci_clk = pci_sync_in;
 	gd->cpu_clk = gd->core_clk;
 	gd->bus_clk = gd->csb_clk;
 	return 0;