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authorwdenk <wdenk>2004-02-23 22:22:28 +0000
committerwdenk <wdenk>2004-02-23 22:22:28 +0000
commit63e73c9a8ed5b32d9c4067ffaad953e9a8fe8f0a (patch)
tree2f8915e0b3024c639748e930b56d60c0d8cf2d99 /cpu/ppc4xx
parentcd0a9de68b03e5a54fd2a08f44be318e4397be01 (diff)
* Patches by Reinhard Meyer, 14 Feb 2004:
- update board/emk tree; use common flash driver - Corrected tested bits in machine check exception in cpu/mpc5xxx/traps.c [adapted for other PPC CPUs -- wd] - Added support for the M48T08 on the EVAL5200 board in rtc/mk48t59.c * Patch by Jon Diekema, 13 Feb 2004: Call show_boot_progress() whenever POST "FAILED" is printed. * Patch by Nishant Kamat, 13 Feb 2004: Add support for TI OMAP1610 H2 Board Fixes for cpu/arm926ejs/interrupt.c (based on Richard Woodruff's patch for arm925, 16 Oct 03) Fix for a timer bug in OMAP1610 Innovator Add support for CS0 (ROM)/CS3 (Flash) boot in OMAP1610 Innovator and H2 * Patches by Stephan Linz, 12 Feb 2004: - add support for NIOS timer with variable period preload counter value - prepare POST framework support for NIOS targets * Patch by Denis Peter, 11 Feb 2004: add POST support for the MIP405 board
Diffstat (limited to 'cpu/ppc4xx')
-rw-r--r--cpu/ppc4xx/Makefile2
-rw-r--r--cpu/ppc4xx/commproc.c69
-rw-r--r--cpu/ppc4xx/traps.c11
3 files changed, 75 insertions, 7 deletions
diff --git a/cpu/ppc4xx/Makefile b/cpu/ppc4xx/Makefile
index 9b54d32758..a841109e8d 100644
--- a/cpu/ppc4xx/Makefile
+++ b/cpu/ppc4xx/Makefile
@@ -28,7 +28,7 @@ LIB = lib$(CPU).a
START = start.o resetvec.o kgdb.o
AOBJS = dcr.o
COBJS = 405gp_enet.o 405gp_pci.o 440gx_enet.o \
- bedbug_405.o \
+ bedbug_405.o commproc.o \
cpu.o cpu_init.o i2c.o interrupts.o \
miiphy.o miiphy_440.o sdram.o serial.o \
spd_sdram.o speed.o traps.o
diff --git a/cpu/ppc4xx/commproc.c b/cpu/ppc4xx/commproc.c
new file mode 100644
index 0000000000..68aab5b7ea
--- /dev/null
+++ b/cpu/ppc4xx/commproc.c
@@ -0,0 +1,69 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ *
+ * Atapted for ppc4XX by Denis Peter
+ */
+
+#include <common.h>
+#include <commproc.h>
+
+
+#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
+
+void post_word_store (ulong a)
+{
+ volatile void *save_addr = (volatile void *)(CFG_OCM_DATA_ADDR + CFG_POST_WORD_ADDR);
+ *(volatile ulong *) save_addr = a;
+}
+
+ulong post_word_load (void)
+{
+ volatile void *save_addr = (volatile void *)(CFG_OCM_DATA_ADDR + CFG_POST_WORD_ADDR);
+ return *(volatile ulong *) save_addr;
+}
+
+#endif /* CONFIG_POST || CONFIG_LOGBUFFER*/
+
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+
+void bootcount_store (ulong a)
+{
+ volatile ulong *save_addr =
+ (volatile ulong *)(CFG_OCM_DATA_ADDR + CFG_BOOTCOUNT_ADDR);
+
+ save_addr[0] = a;
+ save_addr[1] = BOOTCOUNT_MAGIC;
+}
+
+ulong bootcount_load (void)
+{
+ volatile ulong *save_addr =
+ (volatile ulong *)(CFG_OCM_DATA_ADDR + CFG_BOOTCOUNT_ADDR);
+
+ if (save_addr[1] != BOOTCOUNT_MAGIC)
+ return 0;
+ else
+ return save_addr[0];
+}
+
+#endif /* CONFIG_BOOTCOUNT_LIMIT */
diff --git a/cpu/ppc4xx/traps.c b/cpu/ppc4xx/traps.c
index 1cf899eb73..6aecca2db9 100644
--- a/cpu/ppc4xx/traps.c
+++ b/cpu/ppc4xx/traps.c
@@ -164,19 +164,18 @@ MachineCheckException(struct pt_regs *regs)
printf("Machine check in kernel mode.\n");
printf("Caused by (from msr): ");
printf("regs %p ",regs);
- switch( regs->msr & 0x0000F000)
- {
- case (1<<12) :
+ switch( regs->msr & 0x000F0000) {
+ case (0x80000000>>12):
printf("Machine check signal - probably due to mm fault\n"
"with mmu off\n");
break;
- case (1<<13) :
+ case (0x80000000>>13):
printf("Transfer error ack signal\n");
break;
- case (1<<14) :
+ case (0x80000000>>14):
printf("Data parity signal\n");
break;
- case (1<<15) :
+ case (0x80000000>>15):
printf("Address parity signal\n");
break;
default: