diff options
author | Stefan Roese <sr@denx.de> | 2006-06-02 16:18:04 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2006-06-02 16:20:36 +0200 |
commit | a4c8d1389f96040bb6d482523de680ba1b9d7c9e (patch) | |
tree | f03569556b69695d18e8a842957d68a2bc939a09 /cpu/ppc4xx/start.S | |
parent | 392c252efd5d2e67b47ebeb3b7e4f42e7e3d5127 (diff) |
Add support for PCS440EP board
Patch by Stefan Roese, 02 Jun 2006
Diffstat (limited to 'cpu/ppc4xx/start.S')
-rw-r--r-- | cpu/ppc4xx/start.S | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 948de43d142..647088f721a 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -1198,12 +1198,19 @@ ppcSync: .globl relocate_code relocate_code: #if defined(CONFIG_440EP) || defined(CONFIG_440GR) - dccci 0,0 /* Invalidate data cache, now no longer our stack */ + /* + * On some 440er platforms the cache is enabled in the first TLB (Boot-CS) + * to speed up the boot process. Now this cache needs to be disabled. + */ + iccci 0,0 /* Invalidate inst cache */ + dccci 0,0 /* Invalidate data cache, now no longer our stack */ sync + isync addi r1,r0,0x0000 /* TLB entry #0 */ tlbre r0,r1,0x0002 /* Read contents */ ori r0,r0,0x0c00 /* Or in the inhibit, write through bit */ tlbwe r0,r1,0x0002 /* Save it out */ + sync isync #endif mr r1, r3 /* Set new stack pointer */ |