fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT

The ddr code computes most things as 64-bit quantities and had some places
in the middle that it was using phy_addr_t and phys_size_t.

Instead we use unsigned long long through out and only at the last stage of
setting the LAWs and reporting the amount of memory to the board code do we
truncate down to what we can cover via phys_size_t.

This has the added benefit that the DDR controller itself is always setup
the same way regardless of how much memory we have.  Its only the LAW
setup that limits what is visible to the system.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 1 insertions, 1 deletions

diff --git a/cpu/mpc8xxx/ddr/ddr.h b/cpu/mpc8xxx/ddr/ddr.h
index 9ffd5485cdc..f1220750df4 100644
--- a/cpu/mpc8xxx/ddr/ddr.h
+++ b/cpu/mpc8xxx/ddr/ddr.h
@@ -54,7 +54,7 @@ typedef struct {
 #define STEP_PROGRAM_REGS            (1 << 6)
 #define STEP_ALL                     0xFFF
 
-extern phys_size_t
+extern unsigned long long
 fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step);
 
 extern const char * step_to_string(unsigned int step);