diff options
author | Poonam Aggrwal <poonam.aggrwal@freescale.com> | 2009-07-31 12:08:27 +0530 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2009-08-28 17:12:39 -0500 |
commit | 87c7661b42aa7672539b54b51d3d5c4013ec6f6c (patch) | |
tree | 8ea50290ecaa58e4d8cc329f9b8e870e87d9545c /cpu/mpc8xxx/cpu.c | |
parent | 728ece343e8bb2a66ee977c49d455439e3b28da9 (diff) |
85xx: Added P1020 Processor Support.
P1020 is another member of QorIQ series of processors which falls in ULE
category. It is an e500 based dual core SOC.
Being a scaled down version of P2020 it has following differences:
- 533MHz - 800MHz core frequency.
- 256Kbyte L2 cache
- Ethernet controllers with classification capabilities.
Also the SOC is pin compatible with P2020
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc8xxx/cpu.c')
-rw-r--r-- | cpu/mpc8xxx/cpu.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cpu/mpc8xxx/cpu.c b/cpu/mpc8xxx/cpu.c index 17aed62b16f..fbab9980eec 100644 --- a/cpu/mpc8xxx/cpu.c +++ b/cpu/mpc8xxx/cpu.c @@ -66,6 +66,8 @@ struct cpu_type cpu_type_list [] = { CPU_TYPE_ENTRY(8572, 8572_E, 2), CPU_TYPE_ENTRY(P2020, P2020, 2), CPU_TYPE_ENTRY(P2020, P2020_E, 2), + CPU_TYPE_ENTRY(P1020, P1020, 2), + CPU_TYPE_ENTRY(P1020, P1020_E, 2), #elif defined(CONFIG_MPC86xx) CPU_TYPE_ENTRY(8610, 8610, 1), CPU_TYPE_ENTRY(8641, 8641, 2), |