diff options
author | Wolfgang Denk <wd@denx.de> | 2007-03-29 12:16:41 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2007-03-29 12:16:41 +0200 |
commit | 6db7d0af2336c126e4d4b2f248cc23516bdd46a8 (patch) | |
tree | 126f54b515332415f9665d51598500921119c16c /cpu/mpc86xx | |
parent | 44ba464b99001f8bd1c456a1e9d59726252f707a (diff) | |
parent | 6eb1df835191d8ce4b81d5af40fa8e0fbe78e997 (diff) |
Merge with /home/wd/git/u-boot/custodian/u-boot-mpc86xx
Diffstat (limited to 'cpu/mpc86xx')
-rw-r--r-- | cpu/mpc86xx/interrupts.c | 20 | ||||
-rw-r--r-- | cpu/mpc86xx/spd_sdram.c | 4 |
2 files changed, 22 insertions, 2 deletions
diff --git a/cpu/mpc86xx/interrupts.c b/cpu/mpc86xx/interrupts.c index 1df6cdc5b9..49820bbd81 100644 --- a/cpu/mpc86xx/interrupts.c +++ b/cpu/mpc86xx/interrupts.c @@ -80,6 +80,26 @@ int interrupt_init(void) { int ret; + /* + * The IRQ0 on Rev 2 is pulled high (low in Rev 1.x) to + * implement PEX10 errata. As INT is active high, it + * will cause core to take 0x500 interrupt. + * + * Due to the PIC's default pass through mode, as soon + * as interrupts are enabled (MSR[EE] = 1), an interrupt + * will be taken and u-boot will hang. This is due to a + * hardware change (per an errata fix) on new revisions + * of the board with Rev 2.x parts. + * + * Setting the PIC to mixed mode prevents the hang. + */ + if ((get_svr() & 0xf0) == 0x20) { + volatile immap_t *immr = (immap_t *)CFG_IMMR; + immr->im_pic.gcr = MPC86xx_PICGCR_RST; + while (immr->im_pic.gcr & MPC86xx_PICGCR_RST); + immr->im_pic.gcr = MPC86xx_PICGCR_MODE; + } + /* call cpu specific function from $(CPU)/interrupts.c */ ret = interrupt_init_cpu(&decrementer_count); diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c index b18e8225de..ac9ff81ce6 100644 --- a/cpu/mpc86xx/spd_sdram.c +++ b/cpu/mpc86xx/spd_sdram.c @@ -284,9 +284,9 @@ spd_init(unsigned char i2c_address, unsigned int ddr_num, } /* - * Adjust DDR II IO voltage biasing. It just makes it work. + * Adjust DDR II IO voltage biasing. Rev1 only */ - if (spd.mem_type == SPD_MEMTYPE_DDR2) { + if (((get_svr() & 0xf0) == 0x10) && (spd.mem_type == SPD_MEMTYPE_DDR2)) { gur->ddrioovcr = (0 | 0x80000000 /* Enable */ | 0x10000000 /* VSEL to 1.8V */ |