diff options
| author | Sandeep Gopalpet <sandeep.kumar@freescale.com> | 2010-03-12 10:45:02 +0530 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2010-04-07 00:21:27 -0500 |
| commit | ff8473e90a018c2bb19a196176c1f2e9602d6354 (patch) | |
| tree | 52f1171686c26eacb52bbf3837f90abc3d86ea32 /cpu/mpc85xx/start.S | |
| parent | 216082754f6da5359ea0db9b0cc03ad531ac6e45 (diff) | |
85xx: Set HID1[mbdd] on e500v2 rev5.0 or greater
The HID1[MBDD] bit is new on rev5.0 or greater cores and will optimize
the performance of mbar/eieio instructions.
Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Diffstat (limited to 'cpu/mpc85xx/start.S')
| -rw-r--r-- | cpu/mpc85xx/start.S | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index 52ea9b34167..b3cb56a5b00 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -208,6 +208,13 @@ _start_e500: #ifndef CONFIG_E500MC li r0,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */ + mfspr r3,PVR + andi. r3,r3, 0xff + cmpwi r3,0x50@l /* if we are rev 5.0 or greater set MBDD */ + blt 1f + /* Set MBDD bit also */ + ori r0, r0, HID1_MBDD@l +1: mtspr HID1,r0 #endif |