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authorWolfgang Denk <wd@pollux.(none)>2005-09-24 22:05:40 +0200
committerWolfgang Denk <wd@pollux.(none)>2005-09-24 22:05:40 +0200
commit4bc12f1ccf8f449c875594675f2d86305bb74097 (patch)
tree8274be0bf9e433a33597cc659cf0cba0874d7be0 /cpu/mips
parent2b792afcc517dcca14c898d3ce444c2bbb7be31a (diff)
Fix ethernet timeouts on dbau1550 and other au1x00 systems
Patch by Leif Lindholm, 29 Dec 2004
Diffstat (limited to 'cpu/mips')
-rw-r--r--cpu/mips/au1x00_eth.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c
index b8219bf05b3..35c07b1461c 100644
--- a/cpu/mips/au1x00_eth.c
+++ b/cpu/mips/au1x00_eth.c
@@ -172,8 +172,8 @@ static int au1x00_init(struct eth_device* dev, bd_t * bd){
(volatile mac_fifo_t*)(MAC0_RX_DMA_ADDR+MAC_RX_BUFF0_STATUS);
int i;
- next_tx = 0;
- next_rx = 0;
+ next_tx = TX_GET_DMA_BUFFER(fifo_tx[0].addr);
+ next_rx = RX_GET_DMA_BUFFER(fifo_rx[0].addr);
/* We have to enable clocks before releasing reset */
*macen = MAC_EN_CLOCK_ENABLE;