m68k: Move cpu/$CPU to arch/m68k/cpu/$CPU

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

8 files changed, 0 insertions, 1447 deletions

diff --git a/cpu/mcf5445x/Makefile b/cpu/mcf5445x/Makefile
deleted file mode 100644
index 26ec29895e..0000000000
--- a/cpu/mcf5445x/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-# CFLAGS += -DET_DEBUG
-
-LIB	= lib$(CPU).a
-
-START	= start.o
-COBJS	= cpu.o speed.o cpu_init.o interrupts.o pci.o
-
-SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
-START	:= $(addprefix $(obj),$(START))
-
-all:	$(obj).depend $(START) $(LIB)
-
-$(LIB):	$(OBJS)
-	$(AR) $(ARFLAGS) $@ $(OBJS)
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/cpu/mcf5445x/config.mk b/cpu/mcf5445x/config.mk
deleted file mode 100644
index b0b49f7b26..0000000000
--- a/cpu/mcf5445x/config.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
-ifneq ($(findstring 4.1,$(shell $(CC) --version)),4.1)
-PLATFORM_CPPFLAGS += -mcpu=54455 -fPIC
-else
-PLATFORM_CPPFLAGS += -m5407 -fPIC
-endif
-
-ifneq (,$(findstring -linux-,$(shell $(CC) --version)))
-ifneq (,$(findstring GOT,$(shell $(LD) --help)))
-PLATFORM_LDFLAGS += --got=single
-endif
-endif
diff --git a/cpu/mcf5445x/cpu.c b/cpu/mcf5445x/cpu.c
deleted file mode 100644
index 6238bc020f..0000000000
--- a/cpu/mcf5445x/cpu.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
- *
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <watchdog.h>
-#include <command.h>
-#include <netdev.h>
-
-#include <asm/immap.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
-{
-	volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM);
-	udelay(1000);
-	rcm->rcr |= RCM_RCR_SOFTRST;
-
-	/* we don't return! */
-	return 0;
-};
-
-int checkcpu(void)
-{
-	volatile ccm_t *ccm = (ccm_t *) MMAP_CCM;
-	u16 msk;
-	u16 id = 0;
-	u8 ver;
-
-	puts("CPU:   ");
-	msk = (ccm->cir >> 6);
-	ver = (ccm->cir & 0x003f);
-	switch (msk) {
-	case 0x48:
-		id = 54455;
-		break;
-	case 0x49:
-		id = 54454;
-		break;
-	case 0x4a:
-		id = 54453;
-		break;
-	case 0x4b:
-		id = 54452;
-		break;
-	case 0x4d:
-		id = 54451;
-		break;
-	case 0x4f:
-		id = 54450;
-		break;
-	}
-
-	if (id) {
-		char buf1[32], buf2[32], buf3[32];
-
-		printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
-		       ver);
-		printf("       CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
-		       strmhz(buf1, gd->cpu_clk),
-		       strmhz(buf2, gd->bus_clk),
-		       strmhz(buf3, gd->flb_clk));
-#ifdef CONFIG_PCI
-		printf("       PCI CLK %s MHz INP CLK %s MHz VCO CLK %s MHz\n",
-		       strmhz(buf1, gd->pci_clk),
-		       strmhz(buf2, gd->inp_clk),
-		       strmhz(buf3, gd->vco_clk));
-#else
-		printf("       INP CLK %s MHz VCO CLK %s MHz\n",
-		       strmhz(buf1, gd->inp_clk),
-		       strmhz(buf2, gd->vco_clk));
-#endif
-	}
-
-	return 0;
-}
-
-#if defined(CONFIG_MCFFEC)
-/* Default initializations for MCFFEC controllers.  To override,
- * create a board-specific function called:
- * 	int board_eth_init(bd_t *bis)
- */
-
-int cpu_eth_init(bd_t *bis)
-{
-	return mcffec_initialize(bis);
-}
-#endif
diff --git a/cpu/mcf5445x/cpu_init.c b/cpu/mcf5445x/cpu_init.c
deleted file mode 100644
index 8d51d35d68..0000000000
--- a/cpu/mcf5445x/cpu_init.c
+++ /dev/null
@@ -1,272 +0,0 @@
-/*
- *
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004-2007 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <watchdog.h>
-#include <asm/immap.h>
-#include <asm/processor.h>
-#include <asm/rtc.h>
-
-#if defined(CONFIG_CMD_NET)
-#include <config.h>
-#include <net.h>
-#include <asm/fec.h>
-#endif
-
-/*
- * Breath some life into the CPU...
- *
- * Set up the memory map,
- * initialize a bunch of registers,
- * initialize the UPM's
- */
-void cpu_init_f(void)
-{
-	volatile scm1_t *scm1 = (scm1_t *) MMAP_SCM1;
-	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-	volatile fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS;
-
-	scm1->mpr = 0x77777777;
-	scm1->pacra = 0;
-	scm1->pacrb = 0;
-	scm1->pacrc = 0;
-	scm1->pacrd = 0;
-	scm1->pacre = 0;
-	scm1->pacrf = 0;
-	scm1->pacrg = 0;
-
-	/* FlexBus */
-	gpio->par_be =
-	    GPIO_PAR_BE_BE3_BE3 | GPIO_PAR_BE_BE2_BE2 | GPIO_PAR_BE_BE1_BE1 |
-	    GPIO_PAR_BE_BE0_BE0;
-	gpio->par_fbctl =
-	    GPIO_PAR_FBCTL_OE | GPIO_PAR_FBCTL_TA_TA | GPIO_PAR_FBCTL_RW_RW |
-	    GPIO_PAR_FBCTL_TS_TS;
-
-#if !defined(CONFIG_CF_SBF)
-#if (defined(CONFIG_SYS_CS0_BASE) && defined(CONFIG_SYS_CS0_MASK) && defined(CONFIG_SYS_CS0_CTRL))
-	fbcs->csar0 = CONFIG_SYS_CS0_BASE;
-	fbcs->cscr0 = CONFIG_SYS_CS0_CTRL;
-	fbcs->csmr0 = CONFIG_SYS_CS0_MASK;
-#endif
-#endif
-
-#if (defined(CONFIG_SYS_CS1_BASE) && defined(CONFIG_SYS_CS1_MASK) && defined(CONFIG_SYS_CS1_CTRL))
-	/* Latch chipselect */
-	fbcs->csar1 = CONFIG_SYS_CS1_BASE;
-	fbcs->cscr1 = CONFIG_SYS_CS1_CTRL;
-	fbcs->csmr1 = CONFIG_SYS_CS1_MASK;
-#endif
-
-#if (defined(CONFIG_SYS_CS2_BASE) && defined(CONFIG_SYS_CS2_MASK) && defined(CONFIG_SYS_CS2_CTRL))
-	fbcs->csar2 = CONFIG_SYS_CS2_BASE;
-	fbcs->cscr2 = CONFIG_SYS_CS2_CTRL;
-	fbcs->csmr2 = CONFIG_SYS_CS2_MASK;
-#endif
-
-#if (defined(CONFIG_SYS_CS3_BASE) && defined(CONFIG_SYS_CS3_MASK) && defined(CONFIG_SYS_CS3_CTRL))
-	fbcs->csar3 = CONFIG_SYS_CS3_BASE;
-	fbcs->cscr3 = CONFIG_SYS_CS3_CTRL;
-	fbcs->csmr3 = CONFIG_SYS_CS3_MASK;
-#endif
-
-#if (defined(CONFIG_SYS_CS4_BASE) && defined(CONFIG_SYS_CS4_MASK) && defined(CONFIG_SYS_CS4_CTRL))
-	fbcs->csar4 = CONFIG_SYS_CS4_BASE;
-	fbcs->cscr4 = CONFIG_SYS_CS4_CTRL;
-	fbcs->csmr4 = CONFIG_SYS_CS4_MASK;
-#endif
-
-#if (defined(CONFIG_SYS_CS5_BASE) && defined(CONFIG_SYS_CS5_MASK) && defined(CONFIG_SYS_CS5_CTRL))
-	fbcs->csar5 = CONFIG_SYS_CS5_BASE;
-	fbcs->cscr5 = CONFIG_SYS_CS5_CTRL;
-	fbcs->csmr5 = CONFIG_SYS_CS5_MASK;
-#endif
-
-	/*
-	 * now the flash base address is no longer at 0 (Newer ColdFire family
-	 * boot at address 0 instead of 0xFFnn_nnnn). The vector table must
-	 * also move to the new location.
-	 */
-	if (CONFIG_SYS_CS0_BASE != 0)
-		setvbr(CONFIG_SYS_CS0_BASE);
-
-#ifdef CONFIG_FSL_I2C
-	gpio->par_feci2c = GPIO_PAR_FECI2C_SCL_SCL | GPIO_PAR_FECI2C_SDA_SDA;
-#endif
-
-	icache_enable();
-}
-
-/*
- * initialize higher level parts of CPU like timers
- */
-int cpu_init_r(void)
-{
-#ifdef CONFIG_MCFRTC
-	volatile rtc_t *rtc = (volatile rtc_t *)(CONFIG_SYS_MCFRTC_BASE);
-	volatile rtcex_t *rtcex = (volatile rtcex_t *)&rtc->extended;
-
-	rtcex->gocu = (CONFIG_SYS_RTC_OSCILLATOR >> 16) & 0xFFFF;
-	rtcex->gocl = CONFIG_SYS_RTC_OSCILLATOR & 0xFFFF;
-#endif
-
-	return (0);
-}
-
-void uart_port_conf(int port)
-{
-	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
-	/* Setup Ports: */
-	switch (port) {
-	case 0:
-		gpio->par_uart &=
-		    ~(GPIO_PAR_UART_U0TXD_U0TXD | GPIO_PAR_UART_U0RXD_U0RXD);
-		gpio->par_uart |=
-		    (GPIO_PAR_UART_U0TXD_U0TXD | GPIO_PAR_UART_U0RXD_U0RXD);
-		break;
-	case 1:
-#ifdef CONFIG_SYS_UART1_PRI_GPIO
-		gpio->par_uart &=
-		    ~(GPIO_PAR_UART_U1TXD_U1TXD | GPIO_PAR_UART_U1RXD_U1RXD);
-		gpio->par_uart |=
-		    (GPIO_PAR_UART_U1TXD_U1TXD | GPIO_PAR_UART_U1RXD_U1RXD);
-#elif defined(CONFIG_SYS_UART1_ALT1_GPIO)
-		gpio->par_ssi &=
-		    (GPIO_PAR_SSI_SRXD_UNMASK | GPIO_PAR_SSI_STXD_UNMASK);
-		gpio->par_ssi |=
-		    (GPIO_PAR_SSI_SRXD_U1RXD | GPIO_PAR_SSI_STXD_U1TXD);
-#endif
-		break;
-	case 2:
-#if defined(CONFIG_SYS_UART2_ALT1_GPIO)
-		gpio->par_timer &=
-		    (GPIO_PAR_TIMER_T3IN_UNMASK | GPIO_PAR_TIMER_T2IN_UNMASK);
-		gpio->par_timer |=
-		    (GPIO_PAR_TIMER_T3IN_U2RXD | GPIO_PAR_TIMER_T2IN_U2TXD);
-#elif defined(CONFIG_SYS_UART2_ALT2_GPIO)
-		gpio->par_timer &=
-		    (GPIO_PAR_FECI2C_SCL_UNMASK | GPIO_PAR_FECI2C_SDA_UNMASK);
-		gpio->par_timer |=
-		    (GPIO_PAR_FECI2C_SCL_U2TXD | GPIO_PAR_FECI2C_SDA_U2RXD);
-#endif
-		break;
-	}
-}
-
-#if defined(CONFIG_CMD_NET)
-int fecpin_setclear(struct eth_device *dev, int setclear)
-{
-	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-	struct fec_info_s *info = (struct fec_info_s *)dev->priv;
-
-	if (setclear) {
-		gpio->par_feci2c |=
-		    (GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0);
-
-		if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
-			gpio->par_fec |= GPIO_PAR_FEC_FEC0_RMII_GPIO;
-		else
-			gpio->par_fec |= GPIO_PAR_FEC_FEC1_RMII_ATA;
-	} else {
-		gpio->par_feci2c &=
-		    ~(GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0);
-
-		if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
-			gpio->par_fec &= GPIO_PAR_FEC_FEC0_UNMASK;
-		else
-			gpio->par_fec &= GPIO_PAR_FEC_FEC1_UNMASK;
-	}
-	return 0;
-}
-#endif
-
-#ifdef CONFIG_CF_DSPI
-void cfspi_port_conf(void)
-{
-	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
-	gpio->par_dspi = GPIO_PAR_DSPI_SIN_SIN | GPIO_PAR_DSPI_SOUT_SOUT |
-	    GPIO_PAR_DSPI_SCK_SCK;
-}
-
-int cfspi_claim_bus(uint bus, uint cs)
-{
-	volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
-	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
-	if ((dspi->sr & DSPI_SR_TXRXS) != DSPI_SR_TXRXS)
-		return -1;
-
-	/* Clear FIFO and resume transfer */
-	dspi->mcr &= ~(DSPI_MCR_CTXF | DSPI_MCR_CRXF);
-
-	switch (cs) {
-	case 0:
-		gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS0_PCS0;
-		gpio->par_dspi |= GPIO_PAR_DSPI_PCS0_PCS0;
-		break;
-	case 1:
-		gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS1_PCS1;
-		gpio->par_dspi |= GPIO_PAR_DSPI_PCS1_PCS1;
-		break;
-	case 2:
-		gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS2_PCS2;
-		gpio->par_dspi |= GPIO_PAR_DSPI_PCS2_PCS2;
-		break;
-	case 5:
-		gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS5_PCS5;
-		gpio->par_dspi |= GPIO_PAR_DSPI_PCS5_PCS5;
-		break;
-	}
-
-	return 0;
-}
-
-void cfspi_release_bus(uint bus, uint cs)
-{
-	volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
-	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
-	dspi->mcr &= ~(DSPI_MCR_CTXF | DSPI_MCR_CRXF);	/* Clear FIFO */
-
-	switch (cs) {
-	case 0:
-		gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS0_PCS0;
-		break;
-	case 1:
-		gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS1_PCS1;
-		break;
-	case 2:
-		gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS2_PCS2;
-		break;
-	case 5:
-		gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS5_PCS5;
-		break;
-	}
-}
-#endif
diff --git a/cpu/mcf5445x/interrupts.c b/cpu/mcf5445x/interrupts.c
deleted file mode 100644
index 85828a67b5..0000000000
--- a/cpu/mcf5445x/interrupts.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- *
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* CPU specific interrupt routine */
-#include <common.h>
-#include <asm/immap.h>
-
-int interrupt_init(void)
-{
-	volatile int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
-
-	/* Make sure all interrupts are disabled */
-	intp->imrh0 |= 0xFFFFFFFF;
-	intp->imrl0 |= 0xFFFFFFFF;
-
-	enable_interrupts();
-	return 0;
-}
-
-#if defined(CONFIG_MCFTMR)
-void dtimer_intr_setup(void)
-{
-	volatile int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
-
-	intp->icr0[CONFIG_SYS_TMRINTR_NO] = CONFIG_SYS_TMRINTR_PRI;
-	intp->imrh0 &= ~CONFIG_SYS_TMRINTR_MASK;
-}
-#endif
diff --git a/cpu/mcf5445x/pci.c b/cpu/mcf5445x/pci.c
deleted file mode 100644
index 7f9784c3cb..0000000000
--- a/cpu/mcf5445x/pci.c
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * PCI Configuration space access support
- */
-#include <common.h>
-#include <pci.h>
-#include <asm/io.h>
-#include <asm/immap.h>
-
-#if defined(CONFIG_PCI)
-/* System RAM mapped over PCI */
-#define CONFIG_SYS_PCI_SYS_MEM_BUS	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_PCI_SYS_MEM_PHYS	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_PCI_SYS_MEM_SIZE	(1024 * 1024 * 1024)
-
-#define cfg_read(val, addr, type, op)		*val = op((type)(addr));
-#define cfg_write(val, addr, type, op)		op((type *)(addr), (val));
-
-#define PCI_OP(rw, size, type, op, mask)				\
-int pci_##rw##_cfg_##size(struct pci_controller *hose,			\
-	pci_dev_t dev, int offset, type val)				\
-{									\
-	u32 addr = 0;							\
-	u16 cfg_type = 0;						\
-	addr = ((offset & 0xfc) | cfg_type | (dev)  | 0x80000000);	\
-	out_be32(hose->cfg_addr, addr);					\
-	cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);	\
-	out_be32(hose->cfg_addr, addr & 0x7fffffff);			\
-	return 0;							\
-}
-
-PCI_OP(read, byte, u8 *, in_8, 3)
-PCI_OP(read, word, u16 *, in_le16, 2)
-PCI_OP(read, dword, u32 *, in_le32, 0)
-PCI_OP(write, byte, u8, out_8, 3)
-PCI_OP(write, word, u16, out_le16, 2)
-PCI_OP(write, dword, u32, out_le32, 0)
-
-void pci_mcf5445x_init(struct pci_controller *hose)
-{
-	volatile pci_t *pci = (volatile pci_t *)MMAP_PCI;
-	volatile pciarb_t *pciarb = (volatile pciarb_t *)MMAP_PCIARB;
-	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-	u32 barEn = 0;
-
-	pciarb->acr = 0x001F001F;
-
-	/* Set PCIGNT1, PCIREQ1, PCIREQ0/PCIGNTIN, PCIGNT0/PCIREQOUT,
-	   PCIREQ2, PCIGNT2 */
-	gpio->par_pci =
-	    GPIO_PAR_PCI_GNT3_GNT3 | GPIO_PAR_PCI_GNT2 | GPIO_PAR_PCI_GNT1 |
-	    GPIO_PAR_PCI_GNT0 | GPIO_PAR_PCI_REQ3_REQ3 | GPIO_PAR_PCI_REQ2 |
-	    GPIO_PAR_PCI_REQ1 | GPIO_PAR_PCI_REQ0;
-
-	/* Assert reset bit */
-	pci->gscr |= PCI_GSCR_PR;
-
-	pci->tcr1 |= PCI_TCR1_P;
-
-	/* Initiator windows */
-	pci->iw0btar = CONFIG_SYS_PCI_MEM_PHYS | (CONFIG_SYS_PCI_MEM_PHYS >> 16);
-	pci->iw1btar = CONFIG_SYS_PCI_IO_PHYS | (CONFIG_SYS_PCI_IO_PHYS >> 16);
-	pci->iw2btar = CONFIG_SYS_PCI_CFG_PHYS | (CONFIG_SYS_PCI_CFG_PHYS >> 16);
-
-	pci->iwcr =
-	    PCI_IWCR_W0C_EN | PCI_IWCR_W1C_EN | PCI_IWCR_W1C_IO |
-	    PCI_IWCR_W2C_EN | PCI_IWCR_W2C_IO;
-
-	pci->icr = 0;
-
-	/* Enable bus master and mem access */
-	pci->scr = PCI_SCR_B | PCI_SCR_M;
-
-	/* Cache line size and master latency */
-	pci->cr1 = PCI_CR1_CLS(8) | PCI_CR1_LTMR(0xF8);
-	pci->cr2 = 0;
-
-#ifdef CONFIG_SYS_PCI_BAR0
-	pci->bar0 = PCI_BAR_BAR0(CONFIG_SYS_PCI_BAR0);
-	pci->tbatr0 = CONFIG_SYS_PCI_TBATR0 | PCI_TBATR_EN;
-	barEn |= PCI_TCR2_B0E;
-#endif
-#ifdef CONFIG_SYS_PCI_BAR1
-	pci->bar1 = PCI_BAR_BAR1(CONFIG_SYS_PCI_BAR1);
-	pci->tbatr1 = CONFIG_SYS_PCI_TBATR1 | PCI_TBATR_EN;
-	barEn |= PCI_TCR2_B1E;
-#endif
-#ifdef CONFIG_SYS_PCI_BAR2
-	pci->bar2 = PCI_BAR_BAR2(CONFIG_SYS_PCI_BAR2);
-	pci->tbatr2 = CONFIG_SYS_PCI_TBATR2 | PCI_TBATR_EN;
-	barEn |= PCI_TCR2_B2E;
-#endif
-#ifdef CONFIG_SYS_PCI_BAR3
-	pci->bar3 = PCI_BAR_BAR3(CONFIG_SYS_PCI_BAR3);
-	pci->tbatr3 = CONFIG_SYS_PCI_TBATR3 | PCI_TBATR_EN;
-	barEn |= PCI_TCR2_B3E;
-#endif
-#ifdef CONFIG_SYS_PCI_BAR4
-	pci->bar4 = PCI_BAR_BAR4(CONFIG_SYS_PCI_BAR4);
-	pci->tbatr4 = CONFIG_SYS_PCI_TBATR4 | PCI_TBATR_EN;
-	barEn |= PCI_TCR2_B4E;
-#endif
-#ifdef CONFIG_SYS_PCI_BAR5
-	pci->bar5 = PCI_BAR_BAR5(CONFIG_SYS_PCI_BAR5);
-	pci->tbatr5 = CONFIG_SYS_PCI_TBATR5 | PCI_TBATR_EN;
-	barEn |= PCI_TCR2_B5E;
-#endif
-
-	pci->tcr2 = barEn;
-
-	/* Deassert reset bit */
-	pci->gscr &= ~PCI_GSCR_PR;
-	udelay(1000);
-
-	/* Enable PCI bus master support */
-	hose->first_busno = 0;
-	hose->last_busno = 0xff;
-
-	pci_set_region(hose->regions + 0, CONFIG_SYS_PCI_MEM_BUS, CONFIG_SYS_PCI_MEM_PHYS,
-		       CONFIG_SYS_PCI_MEM_SIZE, PCI_REGION_MEM);
-
-	pci_set_region(hose->regions + 1, CONFIG_SYS_PCI_IO_BUS, CONFIG_SYS_PCI_IO_PHYS,
-		       CONFIG_SYS_PCI_IO_SIZE, PCI_REGION_IO);
-
-	pci_set_region(hose->regions + 2, CONFIG_SYS_PCI_SYS_MEM_BUS,
-		       CONFIG_SYS_PCI_SYS_MEM_PHYS, CONFIG_SYS_PCI_SYS_MEM_SIZE,
-		       PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-
-	hose->region_count = 3;
-
-	hose->cfg_addr = &(pci->car);
-	hose->cfg_data = (volatile unsigned char *)CONFIG_SYS_PCI_CFG_BUS;
-
-	pci_set_ops(hose, pci_read_cfg_byte, pci_read_cfg_word,
-		    pci_read_cfg_dword, pci_write_cfg_byte, pci_write_cfg_word,
-		    pci_write_cfg_dword);
-
-	/* Hose scan */
-	pci_register_hose(hose);
-	hose->last_busno = pci_hose_scan(hose);
-}
-#endif				/* CONFIG_PCI */
diff --git a/cpu/mcf5445x/speed.c b/cpu/mcf5445x/speed.c
deleted file mode 100644
index 9c0c07733b..0000000000
--- a/cpu/mcf5445x/speed.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/*
- *
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-
-#include <asm/immap.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Low Power Divider specifications
- */
-#define CLOCK_LPD_MIN		(1 << 0)	/* Divider (decoded) */
-#define CLOCK_LPD_MAX		(1 << 15)	/* Divider (decoded) */
-
-#define CLOCK_PLL_FVCO_MAX	540000000
-#define CLOCK_PLL_FVCO_MIN	300000000
-
-#define CLOCK_PLL_FSYS_MAX	266666666
-#define CLOCK_PLL_FSYS_MIN	100000000
-#define MHZ			1000000
-
-void clock_enter_limp(int lpdiv)
-{
-	volatile ccm_t *ccm = (volatile ccm_t *)MMAP_CCM;
-	int i, j;
-
-	/* Check bounds of divider */
-	if (lpdiv < CLOCK_LPD_MIN)
-		lpdiv = CLOCK_LPD_MIN;
-	if (lpdiv > CLOCK_LPD_MAX)
-		lpdiv = CLOCK_LPD_MAX;
-
-	/* Round divider down to nearest power of two */
-	for (i = 0, j = lpdiv; j != 1; j >>= 1, i++) ;
-
-	/* Apply the divider to the system clock */
-	ccm->cdr = (ccm->cdr & 0xF0FF) | CCM_CDR_LPDIV(i);
-
-	/* Enable Limp Mode */
-	ccm->misccr |= CCM_MISCCR_LIMP;
-}
-
-/*
- * brief   Exit Limp mode
- * warning The PLL should be set and locked prior to exiting Limp mode
- */
-void clock_exit_limp(void)
-{
-	volatile ccm_t *ccm = (volatile ccm_t *)MMAP_CCM;
-	volatile pll_t *pll = (volatile pll_t *)MMAP_PLL;
-
-	/* Exit Limp mode */
-	ccm->misccr &= ~CCM_MISCCR_LIMP;
-
-	/* Wait for the PLL to lock */
-	while (!(pll->psr & PLL_PSR_LOCK)) ;
-}
-
-/*
- * get_clocks() fills in gd->cpu_clock and gd->bus_clk
- */
-int get_clocks(void)
-{
-
-	volatile ccm_t *ccm = (volatile ccm_t *)MMAP_CCM;
-	volatile pll_t *pll = (volatile pll_t *)MMAP_PLL;
-	int pllmult_nopci[] = { 20, 10, 24, 18, 12, 6, 16, 8 };
-	int pllmult_pci[] = { 12, 6, 16, 8 };
-	int vco = 0, bPci, temp, fbtemp, pcrvalue;
-	int *pPllmult = NULL;
-	u16 fbpll_mask;
-
-#ifdef CONFIG_M54455EVB
-	volatile u8 *cpld = (volatile u8 *)(CONFIG_SYS_CS2_BASE + 3);
-#endif
-	u8 bootmode;
-
-	/* To determine PCI is present or not */
-	if (((ccm->ccr & CCM_CCR_360_FBCONFIG_MASK) == 0x00e0) ||
-	    ((ccm->ccr & CCM_CCR_360_FBCONFIG_MASK) == 0x0060)) {
-		pPllmult = &pllmult_pci[0];
-		fbpll_mask = 3;		/* 11b */
-		bPci = 1;
-	} else {
-		pPllmult = &pllmult_nopci[0];
-		fbpll_mask = 7;		/* 111b */
-#ifdef CONFIG_PCI
-		gd->pci_clk = 0;
-#endif
-		bPci = 0;
-	}
-
-#ifdef CONFIG_M54455EVB
-	bootmode = (*cpld & 0x03);
-
-	if (bootmode != 3) {
-		/* Temporary read from CCR- fixed fb issue, must be the same clock
-		   as pci or input clock, causing cpld/fpga read inconsistancy */
-		fbtemp = pPllmult[ccm->ccr & fbpll_mask];
-
-		/* Break down into small pieces, code still in flex bus */
-		pcrvalue = pll->pcr & 0xFFFFF0FF;
-		temp = fbtemp - 1;
-		pcrvalue |= PLL_PCR_OUTDIV3(temp);
-
-		pll->pcr = pcrvalue;
-	}
-#endif
-#ifdef CONFIG_M54451EVB
-	/* No external logic to read the bootmode, hard coded from built */
-#ifdef CONFIG_CF_SBF
-	bootmode = 3;
-#else
-	bootmode = 2;
-
-	/* default value is 16 mul, set to 20 mul */
-	pcrvalue = (pll->pcr & 0x00FFFFFF) | 0x14000000;
-	pll->pcr = pcrvalue;
-	while ((pll->psr & PLL_PSR_LOCK) != PLL_PSR_LOCK);
-#endif
-#endif
-
-	if (bootmode == 0) {
-		/* RCON mode */
-		vco = pPllmult[ccm->rcon & fbpll_mask] * CONFIG_SYS_INPUT_CLKSRC;
-
-		if ((vco < CLOCK_PLL_FVCO_MIN) || (vco > CLOCK_PLL_FVCO_MAX)) {
-			/* invaild range, re-set in PCR */
-			int temp = ((pll->pcr & PLL_PCR_OUTDIV2_MASK) >> 4) + 1;
-			int i, j, bus;
-
-			j = (pll->pcr & 0xFF000000) >> 24;
-			for (i = j; i < 0xFF; i++) {
-				vco = i * CONFIG_SYS_INPUT_CLKSRC;
-				if (vco >= CLOCK_PLL_FVCO_MIN) {
-					bus = vco / temp;
-					if (bus <= CLOCK_PLL_FSYS_MIN - MHZ)
-						continue;
-					else
-						break;
-				}
-			}
-			pcrvalue = pll->pcr & 0x00FF00FF;
-			fbtemp = ((i - 1) << 8) | ((i - 1) << 12);
-			pcrvalue |= ((i << 24) | fbtemp);
-
-			pll->pcr = pcrvalue;
-		}
-		gd->vco_clk = vco;	/* Vco clock */
-	} else if (bootmode == 2) {
-		/* Normal mode */
-		vco =  ((pll->pcr & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
-		if ((vco < CLOCK_PLL_FVCO_MIN) || (vco > CLOCK_PLL_FVCO_MAX)) {
-			/* Default value */
-			pcrvalue = (pll->pcr & 0x00FFFFFF);
-			pcrvalue |= pPllmult[ccm->ccr & fbpll_mask] << 24;
-			pll->pcr = pcrvalue;
-			vco =  ((pll->pcr & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
-		}
-		gd->vco_clk = vco;	/* Vco clock */
-	} else if (bootmode == 3) {
-		/* serial mode */
-		vco =  ((pll->pcr & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
-		gd->vco_clk = vco;	/* Vco clock */
-	}
-
-	if ((ccm->ccr & CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) {
-		/* Limp mode */
-	} else {
-		gd->inp_clk = CONFIG_SYS_INPUT_CLKSRC;	/* Input clock */
-
-		temp = (pll->pcr & PLL_PCR_OUTDIV1_MASK) + 1;
-		gd->cpu_clk = vco / temp;	/* cpu clock */
-
-		temp = ((pll->pcr & PLL_PCR_OUTDIV2_MASK) >> 4) + 1;
-		gd->bus_clk = vco / temp;	/* bus clock */
-
-		temp = ((pll->pcr & PLL_PCR_OUTDIV3_MASK) >> 8) + 1;
-		gd->flb_clk = vco / temp;	/* FlexBus clock */
-
-#ifdef CONFIG_PCI
-		if (bPci) {
-			temp = ((pll->pcr & PLL_PCR_OUTDIV4_MASK) >> 12) + 1;
-			gd->pci_clk = vco / temp;	/* PCI clock */
-		}
-#endif
-	}
-
-#ifdef CONFIG_FSL_I2C
-	gd->i2c1_clk = gd->bus_clk;
-#endif
-
-	return (0);
-}
diff --git a/cpu/mcf5445x/start.S b/cpu/mcf5445x/start.S
deleted file mode 100644
index 738e4a7110..0000000000
--- a/cpu/mcf5445x/start.S
+++ /dev/null
@@ -1,545 +0,0 @@
-/*
- * Copyright (C) 2003	Josef Baumgartner <josef.baumgartner@telex.de>
- * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <timestamp.h>
-#include "version.h"
-#include <asm/cache.h>
-
-#ifndef	 CONFIG_IDENT_STRING
-#define	 CONFIG_IDENT_STRING ""
-#endif
-
-#define _START	_start
-#define _FAULT	_fault
-
-#define SAVE_ALL						\
-	move.w	#0x2700,%sr;		/* disable intrs */	\
-	subl	#60,%sp;		/* space for 15 regs */ \
-	moveml	%d0-%d7/%a0-%a6,%sp@;
-
-#define RESTORE_ALL						\
-	moveml	%sp@,%d0-%d7/%a0-%a6;				\
-	addl	#60,%sp;		/* space for 15 regs */ \
-	rte;
-
-#if defined(CONFIG_CF_SBF)
-#define ASM_DRAMINIT	(asm_dram_init - TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
-#define ASM_SBF_IMG_HDR	(asm_sbf_img_hdr - TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
-#endif
-
-.text
-
-/*
- *	Vector table. This is used for initial platform startup.
- *	These vectors are to catch any un-intended traps.
- */
-_vectors:
-#if defined(CONFIG_CF_SBF)
-
-INITSP:	.long	0		/* Initial SP	*/
-INITPC:	.long	ASM_DRAMINIT	/* Initial PC 	*/
-
-#else
-
-INITSP:		.long	0	/* Initial SP	*/
-INITPC:		.long	_START	/* Initial PC 		*/
-
-#endif
-
-vector02:	.long	_FAULT	/* Access Error		*/
-vector03:	.long	_FAULT	/* Address Error	*/
-vector04:	.long	_FAULT	/* Illegal Instruction	*/
-vector05:	.long	_FAULT	/* Reserved		*/
-vector06:	.long	_FAULT	/* Reserved		*/
-vector07:	.long	_FAULT	/* Reserved		*/
-vector08:	.long	_FAULT	/* Privilege Violation	*/
-vector09:	.long	_FAULT	/* Trace		*/
-vector0A:	.long	_FAULT	/* Unimplemented A-Line	*/
-vector0B:	.long	_FAULT	/* Unimplemented F-Line	*/
-vector0C:	.long	_FAULT	/* Debug Interrupt	*/
-vector0D:	.long	_FAULT	/* Reserved		*/
-vector0E:	.long	_FAULT	/* Format Error		*/
-vector0F:	.long	_FAULT	/* Unitialized Int.	*/
-
-/* Reserved */
-vector10_17:
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-
-vector18:	.long	_FAULT	/* Spurious Interrupt	*/
-vector19:	.long	_FAULT	/* Autovector Level 1	*/
-vector1A:	.long	_FAULT	/* Autovector Level 2	*/
-vector1B:	.long	_FAULT	/* Autovector Level 3	*/
-vector1C:	.long	_FAULT	/* Autovector Level 4	*/
-vector1D:	.long	_FAULT	/* Autovector Level 5	*/
-vector1E:	.long	_FAULT	/* Autovector Level 6	*/
-vector1F:	.long	_FAULT	/* Autovector Level 7	*/
-
-#if !defined(CONFIG_CF_SBF)
-
-/* TRAP #0 - #15 */
-vector20_2F:
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-
-/* Reserved	*/
-vector30_3F:
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-
-vector64_127:
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-
-vector128_191:
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-
-vector192_255:
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-#endif
-
-#if defined(CONFIG_CF_SBF)
-	/* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
-asm_sbf_img_hdr:
-	.long	0x00000000	/* checksum, not yet implemented */
-	.long	0x00030000	/* image length */
-	.long	TEXT_BASE	/* image to be relocated at */
-
-asm_dram_init:
-	move.w #0x2700,%sr		/* Mask off Interrupt */
-
-	move.l	#CONFIG_SYS_INIT_RAM_ADDR, %d0
-	movec	%d0, %VBR
-
-	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
-	movec	%d0, %RAMBAR1
-
-	/* initialize general use internal ram */
-	move.l #0, %d0
-	move.l #(ICACHE_STATUS), %a1	/* icache */
-	move.l #(DCACHE_STATUS), %a2	/* dcache */
-	move.l %d0, (%a1)
-	move.l %d0, (%a2)
-
-	/* invalidate and disable cache */
-	move.l	#(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
-	movec	%d0, %CACR		/* Invalidate cache */
-	move.l	#0, %d0
-	movec	%d0, %ACR0
-	movec	%d0, %ACR1
-	movec	%d0, %ACR2
-	movec	%d0, %ACR3
-
-	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
-	clr.l %sp@-
-
-	/* Must disable global address */
-	move.l	#0xFC008000, %a1
-	move.l	#(CONFIG_SYS_CS0_BASE), (%a1)
-	move.l	#0xFC008008, %a1
-	move.l	#(CONFIG_SYS_CS0_CTRL), (%a1)
-	move.l	#0xFC008004, %a1
-	move.l	#(CONFIG_SYS_CS0_MASK), (%a1)
-
-	/* Dram Initialization a1, a2, and d0 */
-	/* mscr sdram */
-	move.l	#0xFC0A4074, %a1
-	move.b	#(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
-	nop
-
-	/* SDRAM Chip 0 and 1 */
-	move.l	#0xFC0B8110, %a1
-	move.l	#0xFC0B8114, %a2
-
-	/* calculate the size */
-	move.l	#0x13, %d1
-	move.l	#(CONFIG_SYS_SDRAM_SIZE), %d2
-#ifdef CONFIG_SYS_SDRAM_BASE1
-	lsr.l	#1, %d2
-#endif
-
-dramsz_loop:
-	lsr.l	#1, %d2
-	add.l	#1, %d1
-	cmp.l	#1, %d2
-	bne	dramsz_loop
-
-	/* SDRAM Chip 0 and 1 */
-	move.l	#(CONFIG_SYS_SDRAM_BASE), (%a1)
-	or.l	%d1, (%a1)
-#ifdef CONFIG_SYS_SDRAM_BASE1
-	move.l	#(CONFIG_SYS_SDRAM_BASE1), (%a2)
-	or.l	%d1, (%a2)
-#endif
-	nop
-
-	/* dram cfg1 and cfg2 */
-	move.l	#0xFC0B8008, %a1
-	move.l	#(CONFIG_SYS_SDRAM_CFG1), (%a1)
-	nop
-	move.l	#0xFC0B800C, %a2
-	move.l	#(CONFIG_SYS_SDRAM_CFG2), (%a2)
-	nop
-
-	move.l	#0xFC0B8000, %a1	/* Mode */
-	move.l	#0xFC0B8004, %a2	/* Ctrl */
-
-	/* Issue PALL */
-	move.l	#(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
-	nop
-
-#ifdef CONFIG_M54455EVB
-	/* Issue LEMR */
-	move.l	#(CONFIG_SYS_SDRAM_EMOD + 0x408), (%a1)
-	nop
-	move.l	#(CONFIG_SYS_SDRAM_MODE + 0x300), (%a1)
-	nop
-#endif
-
-	move.l	#1000, %d1
-	jsr	asm_delay
-
-	/* Issue PALL */
-	move.l	#(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
-	nop
-
-	/* Perform two refresh cycles */
-	move.l	#(CONFIG_SYS_SDRAM_CTRL + 4), %d0
-	nop
-	move.l	%d0, (%a2)
-	move.l	%d0, (%a2)
-	nop
-
-#ifdef CONFIG_M54455EVB
-	move.l	#(CONFIG_SYS_SDRAM_MODE + 0x200), (%a1)
-	nop
-#elif defined(CONFIG_M54451EVB)
-	/* Issue LEMR */
-	move.l	#(CONFIG_SYS_SDRAM_MODE), (%a1)
-	nop
-	move.l	#(CONFIG_SYS_SDRAM_EMOD), (%a1)
-#endif
-
-	move.l	#500, %d1
-	jsr	asm_delay
-
-	move.l	#(CONFIG_SYS_SDRAM_CTRL), %d1
-	and.l	#0x7FFFFFFF, %d1
-#ifdef CONFIG_M54455EVB
-	or.l	#0x10000C00, %d1
-#elif defined(CONFIG_M54451EVB)
-	or.l	#0x10000C00, %d1
-#endif
-	move.l	%d1, (%a2)
-	nop
-
-	move.l	#2000, %d1
-	jsr	asm_delay
-
-	/*
-	 * DSPI Initialization
-	 * a0 - general, sram - 0x80008000 - 32, see M54455EVB.h
-	 * a1 - dspi status
-	 * a2 - dtfr
-	 * a3 - drfr
-	 * a4 - Dst addr
-	 */
-	/* Enable pins for DSPI mode - chip-selects are enabled later */
-asm_dspi_init:
-	move.l	#0xFC0A4063, %a0
-	move.b	#0x7F, (%a0)
-
-	/* Configure DSPI module */
-	move.l	#0xFC05C000, %a0
-	move.l	#0x80FF0C00, (%a0)	/* Master, clear TX/RX FIFO */
-
-	move.l	#0xFC05C00C, %a0
-	move.l	#0x3E000011, (%a0)
-
-	move.l	#0xFC05C034, %a2	/* dtfr */
-	move.l	#0xFC05C03B, %a3	/* drfr */
-
-	move.l	#(ASM_SBF_IMG_HDR + 4), %a1
-	move.l	(%a1)+, %d5
-	move.l	(%a1), %a4
-
-	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
-	move.l	#(CONFIG_SYS_SBFHDR_SIZE), %d4
-
-	move.l	#0xFC05C02C, %a1	/* dspi status */
-
-	/* Issue commands and address */
-	move.l	#0x8002000B, %d2	/* Fast Read Cmd */
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	move.l	#0x80020000, %d2	/* Address byte 2 */
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	move.l	#0x80020000, %d2	/* Address byte 1 */
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	move.l	#0x80020000, %d2	/* Address byte 0 */
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	move.l	#0x80020000, %d2	/* Dummy Wr and Rd */
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	/* Transfer serial boot header to sram */
-asm_dspi_rd_loop1:
-	move.l	#0x80020000, %d2
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	move.b	%d1, (%a0)		/* read, copy to dst */
-
-	add.l	#1, %a0			/* inc dst by 1 */
-	sub.l	#1, %d4			/* dec cnt by 1 */
-	bne	asm_dspi_rd_loop1
-
-	/* Transfer u-boot from serial flash to memory */
-asm_dspi_rd_loop2:
-	move.l	#0x80020000, %d2
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	move.b	%d1, (%a4)		/* read, copy to dst */
-
-	add.l	#1, %a4			/* inc dst by 1 */
-	sub.l	#1, %d5			/* dec cnt by 1 */
-	bne	asm_dspi_rd_loop2
-
-	move.l	#0x00020000, %d2	/* Terminate */
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	/* jump to memory and execute */
-	move.l	#(TEXT_BASE + 0x400), %a0
-	jmp	(%a0)
-
-asm_dspi_wr_status:
-	move.l	(%a1), %d0		/* status */
-	and.l	#0x0000F000, %d0
-	cmp.l	#0x00003000, %d0
-	bgt	asm_dspi_wr_status
-
-	move.l	%d2, (%a2)
-	rts
-
-asm_dspi_rd_status:
-	move.l	(%a1), %d0		/* status */
-	and.l	#0x000000F0, %d0
-	lsr.l	#4, %d0
-	cmp.l	#0, %d0
-	beq	asm_dspi_rd_status
-
-	move.b	(%a3), %d1
-	rts
-
-asm_delay:
-	nop
-	subq.l	#1, %d1
-	bne	asm_delay
-	rts
-#endif			/* CONFIG_CF_SBF */
-
-	.text
-	. = 0x400
-	.globl	_start
-_start:
-#if !defined(CONFIG_CF_SBF)
-	nop
-	nop
-	move.w #0x2700,%sr		/* Mask off Interrupt */
-
-	/* Set vector base register at the beginning of the Flash */
-	move.l	#CONFIG_SYS_FLASH_BASE, %d0
-	movec	%d0, %VBR
-
-	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
-	movec	%d0, %RAMBAR1
-
-	/* initialize general use internal ram */
-	move.l #0, %d0
-	move.l #(ICACHE_STATUS), %a1	/* icache */
-	move.l #(DCACHE_STATUS), %a2	/* dcache */
-	move.l %d0, (%a1)
-	move.l %d0, (%a2)
-
-	/* invalidate and disable cache */
-	move.l	#(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
-	movec	%d0, %CACR		/* Invalidate cache */
-	move.l	#0, %d0
-	movec	%d0, %ACR0
-	movec	%d0, %ACR1
-	movec	%d0, %ACR2
-	movec	%d0, %ACR3
-
-	/* set stackpointer to end of internal ram to get some stackspace for
-	   the first c-code */
-	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
-	clr.l %sp@-
-#endif
-
-	move.l #__got_start, %a5	/* put relocation table address to a5 */
-
-	bsr cpu_init_f			/* run low-level CPU init code (from flash) */
-	bsr board_init_f		/* run low-level board init code (from flash) */
-
-	/* board_init_f() does not return */
-
-/*------------------------------------------------------------------------------*/
-
-/*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
- * r3 = dest
- * r4 = src
- * r5 = length in bytes
- * r6 = cachelinesize
- */
-	.globl	relocate_code
-relocate_code:
-	link.w %a6,#0
-	move.l 8(%a6), %sp		/* set new stack pointer */
-
-	move.l 12(%a6), %d0		/* Save copy of Global Data pointer */
-	move.l 16(%a6), %a0		/* Save copy of Destination Address */
-
-	move.l #CONFIG_SYS_MONITOR_BASE, %a1
-	move.l #__init_end, %a2
-	move.l %a0, %a3
-
-	/* copy the code to RAM */
-1:
-	move.l (%a1)+, (%a3)+
-	cmp.l  %a1,%a2
-	bgt.s	 1b
-
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-	move.l	%a0, %a1
-	add.l	#(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
-	jmp	(%a1)
-
-in_ram:
-
-clear_bss:
-	/*
-	 * Now clear BSS segment
-	 */
-	move.l	%a0, %a1
-	add.l	#(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
-	move.l	%a0, %d1
-	add.l	#(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
-6:
-	clr.l	(%a1)+
-	cmp.l	%a1,%d1
-	bgt.s	6b
-
-	/*
-	 * fix got table in RAM
-	 */
-	move.l	%a0, %a1
-	add.l	#(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
-	move.l	%a1,%a5			/* * fix got pointer register a5 */
-
-	move.l	%a0, %a2
-	add.l	#(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
-
-7:
-	move.l	(%a1),%d1
-	sub.l	#_start,%d1
-	add.l	%a0,%d1
-	move.l	%d1,(%a1)+
-	cmp.l	%a2, %a1
-	bne	7b
-
-	/* calculate relative jump to board_init_r in ram */
-	move.l %a0, %a1
-	add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
-
-	/* set parameters for board_init_r */
-	move.l %a0,-(%sp)		/* dest_addr */
-	move.l %d0,-(%sp)		/* gd */
-	jsr	(%a1)
-
-/*------------------------------------------------------------------------------*/
-/* exception code */
-	.globl _fault
-_fault:
-	bra _fault
-	.globl	_exc_handler
-
-_exc_handler:
-	SAVE_ALL
-	movel	%sp,%sp@-
-	bsr exc_handler
-	addql	#4,%sp
-	RESTORE_ALL
-
-	.globl	_int_handler
-_int_handler:
-	SAVE_ALL
-	movel	%sp,%sp@-
-	bsr int_handler
-	addql	#4,%sp
-	RESTORE_ALL
-
-/*------------------------------------------------------------------------------*/
-
-	.globl	version_string
-version_string:
-	.ascii U_BOOT_VERSION
-	.ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
-	.ascii CONFIG_IDENT_STRING, "\0"
-	.align 4