diff options
author | Sekhar Nori <nsekhar@ti.com> | 2009-03-23 12:50:51 +0530 |
---|---|---|
committer | Justin Waters <justin.waters@timesys.com> | 2009-09-09 14:03:22 -0400 |
commit | 6a92c7e85e73f43f4153864895cd93f5e56d094e (patch) | |
tree | 831697c49df209582fda4e51e39a214139dc1b2e /cpu/arm926ejs | |
parent | 7cdd11906cae61cbe3d01418ac132022c36925c4 (diff) |
U-Boot: cleanup clock handling code
A side-effect of this is that it allows geting PLLM and PLLC clocks for PLL1
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'cpu/arm926ejs')
-rw-r--r-- | cpu/arm926ejs/da8xx/clock.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/cpu/arm926ejs/da8xx/clock.c b/cpu/arm926ejs/da8xx/clock.c index ff8e36ce5ae..a98d016e9b7 100644 --- a/cpu/arm926ejs/da8xx/clock.c +++ b/cpu/arm926ejs/da8xx/clock.c @@ -34,17 +34,20 @@ int clk_get(unsigned int id) int post_div; volatile unsigned int pll_base; - if ((id >> 8) == 1) + if(id == AUXCLK) + goto out; + + if ((id >> 16) == 1) pll_base = DAVINCI_PLL_CNTRL1_BASE; else pll_base = DAVINCI_PLL_CNTRL0_BASE; + id &= 0xFF; + pre_div = (REG(pll_base + PLL_PREDIV) & 0xff) + 1; pllm = REG(pll_base + PLL_PLLM) + 1; post_div = (REG(pll_base + PLL_POSTDIV) & 0xff) + 1; - if(id == DAVINCI_AUXCLK_CLKID) - goto out; /* Lets keep this simple. Combining operations can result in * unexpected approximations @@ -52,15 +55,15 @@ int clk_get(unsigned int id) pll_out /= pre_div; pll_out *= pllm; - if(id == DAVINCI_PLLM_CLKID) + if(id == PLLM) goto out; pll_out /= post_div; - if(id == DAVINCI_PLLC_CLKID) + if(id == PLLC) goto out; - pll_out /= (REG(pll_base + sysdiv[(id & 0xff) - 1]) & 0xff) + 1; + pll_out /= (REG(pll_base + sysdiv[id - 1]) & 0xff) + 1; out: return pll_out; |