diff options
author | Wolfgang Denk <wd@denx.de> | 2009-04-02 00:24:33 +0200 |
---|---|---|
committer | Wolfgang Denk <wd@denx.de> | 2009-04-02 00:24:33 +0200 |
commit | dfc91c33957c95da34e3888dc87912d5c15a7603 (patch) | |
tree | d5fd6bd3818d817ea618bb9c19330633a71ab1bb /cpu/arm920t | |
parent | c123098035be8bae3859bbfbd06861f197c07631 (diff) | |
parent | 0fc4f64c59873a47d555dd66bad25797d4ecb0ed (diff) |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'cpu/arm920t')
-rw-r--r-- | cpu/arm920t/imx/Makefile | 2 | ||||
-rw-r--r-- | cpu/arm920t/imx/serial.c | 227 | ||||
-rw-r--r-- | cpu/arm920t/ks8695/Makefile | 2 | ||||
-rw-r--r-- | cpu/arm920t/ks8695/serial.c | 117 | ||||
-rw-r--r-- | cpu/arm920t/s3c24x0/Makefile | 3 | ||||
-rw-r--r-- | cpu/arm920t/s3c24x0/i2c.c | 447 | ||||
-rw-r--r-- | cpu/arm920t/s3c24x0/nand.c | 179 | ||||
-rw-r--r-- | cpu/arm920t/s3c24x0/serial.c | 304 |
8 files changed, 3 insertions, 1278 deletions
diff --git a/cpu/arm920t/imx/Makefile b/cpu/arm920t/imx/Makefile index 9207ec1bcb3..d3352deb4b6 100644 --- a/cpu/arm920t/imx/Makefile +++ b/cpu/arm920t/imx/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a -COBJS = generic.o interrupts.o serial.o speed.o +COBJS = generic.o interrupts.o speed.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/arm920t/imx/serial.c b/cpu/arm920t/imx/serial.c deleted file mode 100644 index 85f1167e36e..00000000000 --- a/cpu/arm920t/imx/serial.c +++ /dev/null @@ -1,227 +0,0 @@ -/* - * (c) 2004 Sascha Hauer <sascha@saschahauer.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#include <common.h> -#if defined (CONFIG_IMX) - -#include <asm/arch/imx-regs.h> - -#ifndef CONFIG_IMX_SERIAL_NONE - -#if defined CONFIG_IMX_SERIAL1 -#define UART_BASE IMX_UART1_BASE -#elif defined CONFIG_IMX_SERIAL2 -#define UART_BASE IMX_UART2_BASE -#else -#error "define CONFIG_IMX_SERIAL1, CONFIG_IMX_SERIAL2 or CONFIG_IMX_SERIAL_NONE" -#endif - -struct imx_serial { - volatile uint32_t urxd[16]; - volatile uint32_t utxd[16]; - volatile uint32_t ucr1; - volatile uint32_t ucr2; - volatile uint32_t ucr3; - volatile uint32_t ucr4; - volatile uint32_t ufcr; - volatile uint32_t usr1; - volatile uint32_t usr2; - volatile uint32_t uesc; - volatile uint32_t utim; - volatile uint32_t ubir; - volatile uint32_t ubmr; - volatile uint32_t ubrc; - volatile uint32_t bipr[4]; - volatile uint32_t bmpr[4]; - volatile uint32_t uts; -}; - -DECLARE_GLOBAL_DATA_PTR; - -void serial_setbrg (void) -{ - serial_init(); -} - -extern void imx_gpio_mode(int gpio_mode); - -/* - * Initialise the serial port with the given baudrate. The settings - * are always 8 data bits, no parity, 1 stop bit, no start bits. - * - */ -int serial_init (void) -{ - volatile struct imx_serial* base = (struct imx_serial *)UART_BASE; - unsigned int ufcr_rfdiv; - unsigned int refclk; - -#ifdef CONFIG_IMX_SERIAL1 - imx_gpio_mode(PC11_PF_UART1_TXD); - imx_gpio_mode(PC12_PF_UART1_RXD); -#else - imx_gpio_mode(PB30_PF_UART2_TXD); - imx_gpio_mode(PB31_PF_UART2_RXD); -#endif - - /* Disable UART */ - base->ucr1 &= ~UCR1_UARTEN; - - /* Set to default POR state */ - - base->ucr1 = 0x00000004; - base->ucr2 = 0x00000000; - base->ucr3 = 0x00000000; - base->ucr4 = 0x00008040; - base->uesc = 0x0000002B; - base->utim = 0x00000000; - base->ubir = 0x00000000; - base->ubmr = 0x00000000; - base->uts = 0x00000000; - /* Set clocks */ - base->ucr4 |= UCR4_REF16; - - /* Configure FIFOs */ - base->ufcr = 0xa81; - - /* set the baud rate. - * - * baud * 16 x - * --------- = - - * refclk y - * - * x - 1 = UBIR - * y - 1 = UBMR - * - * each register is 16 bits wide. refclk max is 96 MHz - * - */ - - ufcr_rfdiv = ((base->ufcr) & UFCR_RFDIV) >> 7; - if (ufcr_rfdiv == 6) - ufcr_rfdiv = 7; - else - ufcr_rfdiv = 6 - ufcr_rfdiv; - - refclk = get_PERCLK1(); - refclk /= ufcr_rfdiv; - - /* Set the numerator value minus one of the BRM ratio */ - base->ubir = (gd->baudrate / 100) - 1; - - /* Set the denominator value minus one of the BRM ratio */ - base->ubmr = (refclk/(16 * 100)) - 1; - - /* Set to 8N1 */ - base->ucr2 &= ~UCR2_PREN; - base->ucr2 |= UCR2_WS; - base->ucr2 &= ~UCR2_STPB; - - /* Ignore RTS */ - base->ucr2 |= UCR2_IRTS; - - /* Enable UART */ - base->ucr1 |= UCR1_UARTEN | UCR1_UARTCLKEN; - - /* Enable FIFOs */ - base->ucr2 |= UCR2_SRST | UCR2_RXEN | UCR2_TXEN; - - /* Clear status flags */ - base->usr2 |= USR2_ADET | - USR2_DTRF | - USR2_IDLE | - USR2_IRINT | - USR2_WAKE | - USR2_RTSF | - USR2_BRCD | - USR2_ORE; - - /* Clear status flags */ - base->usr1 |= USR1_PARITYERR | - USR1_RTSD | - USR1_ESCF | - USR1_FRAMERR | - USR1_AIRINT | - USR1_AWAKE; - return (0); -} - -/* - * Read a single byte from the serial port. Returns 1 on success, 0 - * otherwise. When the function is successful, the character read is - * written into its argument c. - */ -int serial_getc (void) -{ - volatile struct imx_serial* base = (struct imx_serial *)UART_BASE; - unsigned char ch; - - while(base->uts & UTS_RXEMPTY); - - ch = (char)base->urxd[0]; - - return ch; -} - -#ifdef CONFIG_HWFLOW -static int hwflow = 0; /* turned off by default */ -int hwflow_onoff(int on) -{ -} -#endif - -/* - * Output a single byte to the serial port. - */ -void serial_putc (const char c) -{ - volatile struct imx_serial* base = (struct imx_serial *)UART_BASE; - - /* Wait for Tx FIFO not full */ - while (base->uts & UTS_TXFULL); - - base->utxd[0] = c; - - /* If \n, also do \r */ - if (c == '\n') - serial_putc ('\r'); -} - -/* - * Test whether a character is in the RX buffer - */ -int serial_tstc (void) -{ - volatile struct imx_serial* base = (struct imx_serial *)UART_BASE; - - /* If receive fifo is empty, return false */ - if (base->uts & UTS_RXEMPTY) - return 0; - return 1; -} - -void -serial_puts (const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} -#endif /* CONFIG_IMX_SERIAL_NONE */ -#endif /* defined CONFIG_IMX */ diff --git a/cpu/arm920t/ks8695/Makefile b/cpu/arm920t/ks8695/Makefile index 7db9473524a..f6b006300b1 100644 --- a/cpu/arm920t/ks8695/Makefile +++ b/cpu/arm920t/ks8695/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a -COBJS = interrupts.o serial.o +COBJS = interrupts.o SOBJS = lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/cpu/arm920t/ks8695/serial.c b/cpu/arm920t/ks8695/serial.c deleted file mode 100644 index aacd1be630b..00000000000 --- a/cpu/arm920t/ks8695/serial.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - * serial.c -- KS8695 serial driver - * - * (C) Copyright 2004, Greg Ungerer <greg.ungerer@opengear.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/platform.h> - -#ifndef CONFIG_SERIAL1 -#error "Bad: you didn't configure serial ..." -#endif - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Define the UART hardware register access structure. - */ -struct ks8695uart { - unsigned int RX; /* 0x00 - Receive data (r) */ - unsigned int TX; /* 0x04 - Transmit data (w) */ - unsigned int FCR; /* 0x08 - Fifo Control (r/w) */ - unsigned int LCR; /* 0x0c - Line Control (r/w) */ - unsigned int MCR; /* 0x10 - Modem Control (r/w) */ - unsigned int LSR; /* 0x14 - Line Status (r/w) */ - unsigned int MSR; /* 0x18 - Modem Status (r/w) */ - unsigned int BD; /* 0x1c - Baud Rate (r/w) */ - unsigned int SR; /* 0x20 - Status (r/w) */ -}; - -#define KS8695_UART_ADDR ((void *) (KS8695_IO_BASE + KS8695_UART_RX_BUFFER)) -#define KS8695_UART_CLK 25000000 - - -/* - * Under some circumstances we want to be "quiet" and not issue any - * serial output - though we want u-boot to otherwise work and behave - * the same. By default be noisy. - */ -int serial_console = 1; - - -void serial_setbrg(void) -{ - volatile struct ks8695uart *uartp = KS8695_UART_ADDR; - - /* Set to global baud rate and 8 data bits, no parity, 1 stop bit*/ - uartp->BD = KS8695_UART_CLK / gd->baudrate; - uartp->LCR = KS8695_UART_LINEC_WLEN8; -} - -int serial_init(void) -{ - serial_console = 1; - serial_setbrg(); - return 0; -} - -void serial_raw_putc(const char c) -{ - volatile struct ks8695uart *uartp = KS8695_UART_ADDR; - int i; - - for (i = 0; (i < 0x100000); i++) { - if (uartp->LSR & KS8695_UART_LINES_TXFE) - break; - } - - uartp->TX = c; -} - -void serial_putc(const char c) -{ - if (serial_console) { - serial_raw_putc(c); - if (c == '\n') - serial_raw_putc('\r'); - } -} - -int serial_tstc(void) -{ - volatile struct ks8695uart *uartp = KS8695_UART_ADDR; - if (serial_console) - return ((uartp->LSR & KS8695_UART_LINES_RXFE) ? 1 : 0); - return 0; -} - -void serial_puts(const char *s) -{ - char c; - while ((c = *s++) != 0) - serial_putc(c); -} - -int serial_getc(void) -{ - volatile struct ks8695uart *uartp = KS8695_UART_ADDR; - - while ((uartp->LSR & KS8695_UART_LINES_RXFE) == 0) - ; - return (uartp->RX); -} diff --git a/cpu/arm920t/s3c24x0/Makefile b/cpu/arm920t/s3c24x0/Makefile index 676492025ae..3afe19ce9c7 100644 --- a/cpu/arm920t/s3c24x0/Makefile +++ b/cpu/arm920t/s3c24x0/Makefile @@ -25,8 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a -COBJS = i2c.o interrupts.o serial.o speed.o \ - usb.o usb_ohci.o nand.o +COBJS = interrupts.o speed.o usb.o usb_ohci.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/arm920t/s3c24x0/i2c.c b/cpu/arm920t/s3c24x0/i2c.c deleted file mode 100644 index fba5cd1b5fb..00000000000 --- a/cpu/arm920t/s3c24x0/i2c.c +++ /dev/null @@ -1,447 +0,0 @@ -/* - * (C) Copyright 2002 - * David Mueller, ELSOFT AG, d.mueller@elsoft.ch - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* This code should work for both the S3C2400 and the S3C2410 - * as they seem to have the same I2C controller inside. - * The different address mapping is handled by the s3c24xx.h files below. - */ - -#include <common.h> - -#ifdef CONFIG_DRIVER_S3C24X0_I2C - -#if defined(CONFIG_S3C2400) -#include <s3c2400.h> -#elif defined(CONFIG_S3C2410) -#include <s3c2410.h> -#endif -#include <i2c.h> - -#ifdef CONFIG_HARD_I2C - -#define I2C_WRITE 0 -#define I2C_READ 1 - -#define I2C_OK 0 -#define I2C_NOK 1 -#define I2C_NACK 2 -#define I2C_NOK_LA 3 /* Lost arbitration */ -#define I2C_NOK_TOUT 4 /* time out */ - -#define I2CSTAT_BSY 0x20 /* Busy bit */ -#define I2CSTAT_NACK 0x01 /* Nack bit */ -#define I2CCON_IRPND 0x10 /* Interrupt pending bit */ -#define I2C_MODE_MT 0xC0 /* Master Transmit Mode */ -#define I2C_MODE_MR 0x80 /* Master Receive Mode */ -#define I2C_START_STOP 0x20 /* START / STOP */ -#define I2C_TXRX_ENA 0x10 /* I2C Tx/Rx enable */ - -#define I2C_TIMEOUT 1 /* 1 second */ - - -static int GetI2CSDA(void) -{ - S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); - -#ifdef CONFIG_S3C2410 - return (gpio->GPEDAT & 0x8000) >> 15; -#endif -#ifdef CONFIG_S3C2400 - return (gpio->PGDAT & 0x0020) >> 5; -#endif -} - -#if 0 -static void SetI2CSDA(int x) -{ - rGPEDAT = (rGPEDAT & ~0x8000) | (x&1) << 15; -} -#endif - -static void SetI2CSCL(int x) -{ - S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); - -#ifdef CONFIG_S3C2410 - gpio->GPEDAT = (gpio->GPEDAT & ~0x4000) | (x&1) << 14; -#endif -#ifdef CONFIG_S3C2400 - gpio->PGDAT = (gpio->PGDAT & ~0x0040) | (x&1) << 6; -#endif -} - - -static int WaitForXfer (void) -{ - S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C (); - int i, status; - - i = I2C_TIMEOUT * 10000; - status = i2c->IICCON; - while ((i > 0) && !(status & I2CCON_IRPND)) { - udelay (100); - status = i2c->IICCON; - i--; - } - - return (status & I2CCON_IRPND) ? I2C_OK : I2C_NOK_TOUT; -} - -static int IsACK (void) -{ - S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C (); - - return (!(i2c->IICSTAT & I2CSTAT_NACK)); -} - -static void ReadWriteByte (void) -{ - S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C (); - - i2c->IICCON &= ~I2CCON_IRPND; -} - -void i2c_init (int speed, int slaveadd) -{ - S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C (); - S3C24X0_GPIO *const gpio = S3C24X0_GetBase_GPIO (); - ulong freq, pres = 16, div; - int i, status; - - /* wait for some time to give previous transfer a chance to finish */ - - i = I2C_TIMEOUT * 1000; - status = i2c->IICSTAT; - while ((i > 0) && (status & I2CSTAT_BSY)) { - udelay (1000); - status = i2c->IICSTAT; - i--; - } - - if ((status & I2CSTAT_BSY) || GetI2CSDA () == 0) { -#ifdef CONFIG_S3C2410 - ulong old_gpecon = gpio->GPECON; -#endif -#ifdef CONFIG_S3C2400 - ulong old_gpecon = gpio->PGCON; -#endif - /* bus still busy probably by (most) previously interrupted transfer */ - -#ifdef CONFIG_S3C2410 - /* set I2CSDA and I2CSCL (GPE15, GPE14) to GPIO */ - gpio->GPECON = (gpio->GPECON & ~0xF0000000) | 0x10000000; -#endif -#ifdef CONFIG_S3C2400 - /* set I2CSDA and I2CSCL (PG5, PG6) to GPIO */ - gpio->PGCON = (gpio->PGCON & ~0x00003c00) | 0x00001000; -#endif - - /* toggle I2CSCL until bus idle */ - SetI2CSCL (0); - udelay (1000); - i = 10; - while ((i > 0) && (GetI2CSDA () != 1)) { - SetI2CSCL (1); - udelay (1000); - SetI2CSCL (0); - udelay (1000); - i--; - } - SetI2CSCL (1); - udelay (1000); - - /* restore pin functions */ -#ifdef CONFIG_S3C2410 - gpio->GPECON = old_gpecon; -#endif -#ifdef CONFIG_S3C2400 - gpio->PGCON = old_gpecon; -#endif - } - - /* calculate prescaler and divisor values */ - freq = get_PCLK (); - if ((freq / pres / (16 + 1)) > speed) - /* set prescaler to 512 */ - pres = 512; - - div = 0; - while ((freq / pres / (div + 1)) > speed) - div++; - - /* set prescaler, divisor according to freq, also set - * ACKGEN, IRQ */ - i2c->IICCON = (div & 0x0F) | 0xA0 | ((pres == 512) ? 0x40 : 0); - - /* init to SLAVE REVEIVE and set slaveaddr */ - i2c->IICSTAT = 0; - i2c->IICADD = slaveadd; - /* program Master Transmit (and implicit STOP) */ - i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA; - -} - -/* - * cmd_type is 0 for write, 1 for read. - * - * addr_len can take any value from 0-255, it is only limited - * by the char, we could make it larger if needed. If it is - * 0 we skip the address write cycle. - */ -static -int i2c_transfer (unsigned char cmd_type, - unsigned char chip, - unsigned char addr[], - unsigned char addr_len, - unsigned char data[], unsigned short data_len) -{ - S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C (); - int i, status, result; - - if (data == 0 || data_len == 0) { - /*Don't support data transfer of no length or to address 0 */ - printf ("i2c_transfer: bad call\n"); - return I2C_NOK; - } - - /* Check I2C bus idle */ - i = I2C_TIMEOUT * 1000; - status = i2c->IICSTAT; - while ((i > 0) && (status & I2CSTAT_BSY)) { - udelay (1000); - status = i2c->IICSTAT; - i--; - } - - if (status & I2CSTAT_BSY) - return I2C_NOK_TOUT; - - i2c->IICCON |= 0x80; - result = I2C_OK; - - switch (cmd_type) { - case I2C_WRITE: - if (addr && addr_len) { - i2c->IICDS = chip; - /* send START */ - i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP; - i = 0; - while ((i < addr_len) && (result == I2C_OK)) { - result = WaitForXfer (); - i2c->IICDS = addr[i]; - ReadWriteByte (); - i++; - } - i = 0; - while ((i < data_len) && (result == I2C_OK)) { - result = WaitForXfer (); - i2c->IICDS = data[i]; - ReadWriteByte (); - i++; - } - } else { - i2c->IICDS = chip; - /* send START */ - i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP; - i = 0; - while ((i < data_len) && (result = I2C_OK)) { - result = WaitForXfer (); - i2c->IICDS = data[i]; - ReadWriteByte (); - i++; - } - } - - if (result == I2C_OK) - result = WaitForXfer (); - - /* send STOP */ - i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA; - ReadWriteByte (); - break; - - case I2C_READ: - if (addr && addr_len) { - i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA; - i2c->IICDS = chip; - /* send START */ - i2c->IICSTAT |= I2C_START_STOP; - result = WaitForXfer (); - if (IsACK ()) { - i = 0; - while ((i < addr_len) && (result == I2C_OK)) { - i2c->IICDS = addr[i]; - ReadWriteByte (); - result = WaitForXfer (); - i++; - } - - i2c->IICDS = chip; - /* resend START */ - i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA | - I2C_START_STOP; - ReadWriteByte (); - result = WaitForXfer (); - i = 0; - while ((i < data_len) && (result == I2C_OK)) { - /* disable ACK for final READ */ - if (i == data_len - 1) - i2c->IICCON &= ~0x80; - ReadWriteByte (); - result = WaitForXfer (); - data[i] = i2c->IICDS; - i++; - } - } else { - result = I2C_NACK; - } - - } else { - i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA; - i2c->IICDS = chip; - /* send START */ - i2c->IICSTAT |= I2C_START_STOP; - result = WaitForXfer (); - - if (IsACK ()) { - i = 0; - while ((i < data_len) && (result == I2C_OK)) { - /* disable ACK for final READ */ - if (i == data_len - 1) - i2c->IICCON &= ~0x80; - ReadWriteByte (); - result = WaitForXfer (); - data[i] = i2c->IICDS; - i++; - } - } else { - result = I2C_NACK; - } - } - - /* send STOP */ - i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA; - ReadWriteByte (); - break; - - default: - printf ("i2c_transfer: bad call\n"); - result = I2C_NOK; - break; - } - - return (result); -} - -int i2c_probe (uchar chip) -{ - uchar buf[1]; - - buf[0] = 0; - - /* - * What is needed is to send the chip address and verify that the - * address was <ACK>ed (i.e. there was a chip at that address which - * drove the data line low). - */ - return (i2c_transfer (I2C_READ, chip << 1, 0, 0, buf, 1) != I2C_OK); -} - -int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len) -{ - uchar xaddr[4]; - int ret; - - if (alen > 4) { - printf ("I2C read: addr len %d not supported\n", alen); - return 1; - } - - if (alen > 0) { - xaddr[0] = (addr >> 24) & 0xFF; - xaddr[1] = (addr >> 16) & 0xFF; - xaddr[2] = (addr >> 8) & 0xFF; - xaddr[3] = addr & 0xFF; - } - -#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW - /* - * EEPROM chips that implement "address overflow" are ones - * like Catalyst 24WC04/08/16 which has 9/10/11 bits of - * address and the extra bits end up in the "chip address" - * bit slots. This makes a 24WC08 (1Kbyte) chip look like - * four 256 byte chips. - * - * Note that we consider the length of the address field to - * still be one byte because the extra address bits are - * hidden in the chip address. - */ - if (alen > 0) - chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); -#endif - if ((ret = - i2c_transfer (I2C_READ, chip << 1, &xaddr[4 - alen], alen, - buffer, len)) != 0) { - printf ("I2c read: failed %d\n", ret); - return 1; - } - return 0; -} - -int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) -{ - uchar xaddr[4]; - - if (alen > 4) { - printf ("I2C write: addr len %d not supported\n", alen); - return 1; - } - - if (alen > 0) { - xaddr[0] = (addr >> 24) & 0xFF; - xaddr[1] = (addr >> 16) & 0xFF; - xaddr[2] = (addr >> 8) & 0xFF; - xaddr[3] = addr & 0xFF; - } -#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW - /* - * EEPROM chips that implement "address overflow" are ones - * like Catalyst 24WC04/08/16 which has 9/10/11 bits of - * address and the extra bits end up in the "chip address" - * bit slots. This makes a 24WC08 (1Kbyte) chip look like - * four 256 byte chips. - * - * Note that we consider the length of the address field to - * still be one byte because the extra address bits are - * hidden in the chip address. - */ - if (alen > 0) - chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); -#endif - return (i2c_transfer - (I2C_WRITE, chip << 1, &xaddr[4 - alen], alen, buffer, - len) != 0); -} -#endif /* CONFIG_HARD_I2C */ - -#endif /* CONFIG_DRIVER_S3C24X0_I2C */ diff --git a/cpu/arm920t/s3c24x0/nand.c b/cpu/arm920t/s3c24x0/nand.c deleted file mode 100644 index 60174fb4d2b..00000000000 --- a/cpu/arm920t/s3c24x0/nand.c +++ /dev/null @@ -1,179 +0,0 @@ -/* - * (C) Copyright 2006 OpenMoko, Inc. - * Author: Harald Welte <laforge@openmoko.org> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> - -#if 0 -#define DEBUGN printf -#else -#define DEBUGN(x, args ...) {} -#endif - -#if defined(CONFIG_CMD_NAND) -#if !defined(CONFIG_NAND_LEGACY) - -#include <nand.h> -#include <s3c2410.h> -#include <asm/io.h> - -#define __REGb(x) (*(volatile unsigned char *)(x)) -#define __REGi(x) (*(volatile unsigned int *)(x)) - -#define NF_BASE 0x4e000000 -#define NFCONF __REGi(NF_BASE + 0x0) -#define NFCMD __REGb(NF_BASE + 0x4) -#define NFADDR __REGb(NF_BASE + 0x8) -#define NFDATA __REGb(NF_BASE + 0xc) -#define NFSTAT __REGb(NF_BASE + 0x10) -#define NFECC0 __REGb(NF_BASE + 0x14) -#define NFECC1 __REGb(NF_BASE + 0x15) -#define NFECC2 __REGb(NF_BASE + 0x16) - -#define S3C2410_NFCONF_EN (1<<15) -#define S3C2410_NFCONF_512BYTE (1<<14) -#define S3C2410_NFCONF_4STEP (1<<13) -#define S3C2410_NFCONF_INITECC (1<<12) -#define S3C2410_NFCONF_nFCE (1<<11) -#define S3C2410_NFCONF_TACLS(x) ((x)<<8) -#define S3C2410_NFCONF_TWRPH0(x) ((x)<<4) -#define S3C2410_NFCONF_TWRPH1(x) ((x)<<0) - -#define S3C2410_ADDR_NALE 4 -#define S3C2410_ADDR_NCLE 8 - -static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) -{ - struct nand_chip *chip = mtd->priv; - - DEBUGN("hwcontrol(): 0x%02x 0x%02x\n", cmd, ctrl); - - if (ctrl & NAND_CTRL_CHANGE) { - ulong IO_ADDR_W = NF_BASE; - - if (!(ctrl & NAND_CLE)) - IO_ADDR_W |= S3C2410_ADDR_NCLE; - if (!(ctrl & NAND_ALE)) - IO_ADDR_W |= S3C2410_ADDR_NALE; - - chip->IO_ADDR_W = (void *)IO_ADDR_W; - - if (ctrl & NAND_NCE) - NFCONF &= ~S3C2410_NFCONF_nFCE; - else - NFCONF |= S3C2410_NFCONF_nFCE; - } - - if (cmd != NAND_CMD_NONE) - writeb(cmd, chip->IO_ADDR_W); -} - -static int s3c2410_dev_ready(struct mtd_info *mtd) -{ - DEBUGN("dev_ready\n"); - return (NFSTAT & 0x01); -} - -#ifdef CONFIG_S3C2410_NAND_HWECC -void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) -{ - DEBUGN("s3c2410_nand_enable_hwecc(%p, %d)\n", mtd, mode); - NFCONF |= S3C2410_NFCONF_INITECC; -} - -static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, - u_char *ecc_code) -{ - ecc_code[0] = NFECC0; - ecc_code[1] = NFECC1; - ecc_code[2] = NFECC2; - DEBUGN("s3c2410_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n", - mtd , ecc_code[0], ecc_code[1], ecc_code[2]); - - return 0; -} - -static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, - u_char *read_ecc, u_char *calc_ecc) -{ - if (read_ecc[0] == calc_ecc[0] && - read_ecc[1] == calc_ecc[1] && - read_ecc[2] == calc_ecc[2]) - return 0; - - printf("s3c2410_nand_correct_data: not implemented\n"); - return -1; -} -#endif - -int board_nand_init(struct nand_chip *nand) -{ - u_int32_t cfg; - u_int8_t tacls, twrph0, twrph1; - S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); - - DEBUGN("board_nand_init()\n"); - - clk_power->CLKCON |= (1 << 4); - - /* initialize hardware */ - twrph0 = 3; twrph1 = 0; tacls = 0; - - cfg = S3C2410_NFCONF_EN; - cfg |= S3C2410_NFCONF_TACLS(tacls - 1); - cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1); - cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1); - - NFCONF = cfg; - - /* initialize nand_chip data structure */ - nand->IO_ADDR_R = nand->IO_ADDR_W = (void *)0x4e00000c; - - /* read_buf and write_buf are default */ - /* read_byte and write_byte are default */ - - /* hwcontrol always must be implemented */ - nand->cmd_ctrl = s3c2410_hwcontrol; - - nand->dev_ready = s3c2410_dev_ready; - -#ifdef CONFIG_S3C2410_NAND_HWECC - nand->ecc.hwctl = s3c2410_nand_enable_hwecc; - nand->ecc.calculate = s3c2410_nand_calculate_ecc; - nand->ecc.correct = s3c2410_nand_correct_data; - nand->ecc.mode = NAND_ECC_HW3_512; -#else - nand->ecc.mode = NAND_ECC_SOFT; -#endif - -#ifdef CONFIG_S3C2410_NAND_BBT - nand->options = NAND_USE_FLASH_BBT; -#else - nand->options = 0; -#endif - - DEBUGN("end of nand_init\n"); - - return 0; -} - -#else - #error "U-Boot legacy NAND support not available for S3C2410" -#endif -#endif diff --git a/cpu/arm920t/s3c24x0/serial.c b/cpu/arm920t/s3c24x0/serial.c deleted file mode 100644 index 064b99871d0..00000000000 --- a/cpu/arm920t/s3c24x0/serial.c +++ /dev/null @@ -1,304 +0,0 @@ -/* - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#include <common.h> -#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) - -#if defined(CONFIG_S3C2400) || defined(CONFIG_TRAB) -#include <s3c2400.h> -#elif defined(CONFIG_S3C2410) -#include <s3c2410.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_SERIAL1 -#define UART_NR S3C24X0_UART0 - -#elif defined(CONFIG_SERIAL2) -# if defined(CONFIG_TRAB) -# error "TRAB supports only CONFIG_SERIAL1" -# endif -#define UART_NR S3C24X0_UART1 - -#elif defined(CONFIG_SERIAL3) -# if defined(CONFIG_TRAB) -# #error "TRAB supports only CONFIG_SERIAL1" -# endif -#define UART_NR S3C24X0_UART2 - -#else -#error "Bad: you didn't configure serial ..." -#endif - -#if defined(CONFIG_SERIAL_MULTI) -#include <serial.h> - -/* Multi serial device functions */ -#define DECLARE_S3C_SERIAL_FUNCTIONS(port) \ - int s3serial##port##_init (void) {\ - return serial_init_dev(port);}\ - void s3serial##port##_setbrg (void) {\ - serial_setbrg_dev(port);}\ - int s3serial##port##_getc (void) {\ - return serial_getc_dev(port);}\ - int s3serial##port##_tstc (void) {\ - return serial_tstc_dev(port);}\ - void s3serial##port##_putc (const char c) {\ - serial_putc_dev(port, c);}\ - void s3serial##port##_puts (const char *s) {\ - serial_puts_dev(port, s);} - -#define INIT_S3C_SERIAL_STRUCTURE(port,name,bus) {\ - name,\ - bus,\ - s3serial##port##_init,\ - s3serial##port##_setbrg,\ - s3serial##port##_getc,\ - s3serial##port##_tstc,\ - s3serial##port##_putc,\ - s3serial##port##_puts, } - -#endif /* CONFIG_SERIAL_MULTI */ - -void _serial_setbrg(const int dev_index) -{ - S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); - unsigned int reg = 0; - int i; - - /* value is calculated so : (int)(PCLK/16./baudrate) -1 */ - reg = get_PCLK() / (16 * gd->baudrate) - 1; - - uart->UBRDIV = reg; - for (i = 0; i < 100; i++); -} -#if defined(CONFIG_SERIAL_MULTI) -static inline void -serial_setbrg_dev(unsigned int dev_index) -{ - _serial_setbrg(dev_index); -} -#else -void serial_setbrg(void) -{ - _serial_setbrg(UART_NR); -} -#endif - - -/* Initialise the serial port. The settings are always 8 data bits, no parity, - * 1 stop bit, no start bits. - */ -static int serial_init_dev(const int dev_index) -{ - S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); - - /* FIFO enable, Tx/Rx FIFO clear */ - uart->UFCON = 0x07; - uart->UMCON = 0x0; - - /* Normal,No parity,1 stop,8 bit */ - uart->ULCON = 0x3; - /* - * tx=level,rx=edge,disable timeout int.,enable rx error int., - * normal,interrupt or polling - */ - uart->UCON = 0x245; - -#ifdef CONFIG_HWFLOW - uart->UMCON = 0x1; /* RTS up */ -#endif - - /* FIXME: This is sooooooooooooooooooo ugly */ -#if defined(CONFIG_ARCH_GTA02_v1) || defined(CONFIG_ARCH_GTA02_v2) - /* we need auto hw flow control on the gsm and gps port */ - if (dev_index == 0 || dev_index == 1) - uart->UMCON = 0x10; -#endif - _serial_setbrg(dev_index); - - return (0); -} - -#if !defined(CONFIG_SERIAL_MULTI) -/* Initialise the serial port. The settings are always 8 data bits, no parity, - * 1 stop bit, no start bits. - */ -int serial_init (void) -{ - return serial_init_dev(UART_NR); -} -#endif - -/* - * Read a single byte from the serial port. Returns 1 on success, 0 - * otherwise. When the function is succesfull, the character read is - * written into its argument c. - */ -int _serial_getc (const int dev_index) -{ - S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); - - /* wait for character to arrive */ - while (!(uart->UTRSTAT & 0x1)); - - return uart->URXH & 0xff; -} -#if defined(CONFIG_SERIAL_MULTI) -static inline int serial_getc_dev(unsigned int dev_index) -{ - return _serial_getc(dev_index); -} -#else -int serial_getc (void) -{ - return _serial_getc(UART_NR); -} -#endif - -#ifdef CONFIG_HWFLOW -static int hwflow = 0; /* turned off by default */ -int hwflow_onoff(int on) -{ - switch(on) { - case 0: - default: - break; /* return current */ - case 1: - hwflow = 1; /* turn on */ - break; - case -1: - hwflow = 0; /* turn off */ - break; - } - return hwflow; -} -#endif - -#ifdef CONFIG_MODEM_SUPPORT -static int be_quiet = 0; -void disable_putc(void) -{ - be_quiet = 1; -} - -void enable_putc(void) -{ - be_quiet = 0; -} -#endif - - -/* - * Output a single byte to the serial port. - */ -void _serial_putc (const char c, const int dev_index) -{ - S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); -#ifdef CONFIG_MODEM_SUPPORT - if (be_quiet) - return; -#endif - - /* wait for room in the tx FIFO */ - while (!(uart->UTRSTAT & 0x2)); - -#ifdef CONFIG_HWFLOW - /* Wait for CTS up */ - while(hwflow && !(uart->UMSTAT & 0x1)) - ; -#endif - - uart->UTXH = c; - - /* If \n, also do \r */ - if (c == '\n') - serial_putc ('\r'); -} -#if defined(CONFIG_SERIAL_MULTI) -static inline void serial_putc_dev(unsigned int dev_index, const char c) -{ - _serial_putc(c, dev_index); -} -#else -void serial_putc(const char c) -{ - _serial_putc(c, UART_NR); -} -#endif - - -/* - * Test whether a character is in the RX buffer - */ -int _serial_tstc(const int dev_index) -{ - S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); - - return uart->UTRSTAT & 0x1; -} -#if defined(CONFIG_SERIAL_MULTI) -static inline int -serial_tstc_dev(unsigned int dev_index) -{ - return _serial_tstc(dev_index); -} -#else -int serial_tstc(void) -{ - return _serial_tstc(UART_NR); -} -#endif - -void _serial_puts(const char *s, const int dev_index) -{ - while (*s) { - _serial_putc (*s++, dev_index); - } -} -#if defined(CONFIG_SERIAL_MULTI) -static inline void -serial_puts_dev(int dev_index, const char *s) -{ - _serial_puts(s, dev_index); -} -#else -void -serial_puts (const char *s) -{ - _serial_puts(s, UART_NR); -} -#endif - -#if defined(CONFIG_SERIAL_MULTI) -DECLARE_S3C_SERIAL_FUNCTIONS(0); -struct serial_device s3c24xx_serial0_device = - INIT_S3C_SERIAL_STRUCTURE(0, "s3ser0", "S3UART1"); -DECLARE_S3C_SERIAL_FUNCTIONS(1); -struct serial_device s3c24xx_serial1_device = - INIT_S3C_SERIAL_STRUCTURE(1, "s3ser1", "S3UART2"); -DECLARE_S3C_SERIAL_FUNCTIONS(2); -struct serial_device s3c24xx_serial2_device = - INIT_S3C_SERIAL_STRUCTURE(2, "s3ser2", "S3UART3"); - -#endif /* CONFIG_SERIAL_MULTI */ - -#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */ |