diff options
author | Matthias Kaehlcke <matthias@kaehlcke.net> | 2010-02-01 21:29:39 +0100 |
---|---|---|
committer | Tom Rix <Tom.Rix@windriver.com> | 2010-02-12 12:31:54 -0600 |
commit | fcfb632bd1e9de645b015cf73a78183c299743d8 (patch) | |
tree | 2d222c8cb01a8172ff6f4b0d2c61679acc21a3a9 /cpu/arm920t/ep93xx/cpu.c | |
parent | cf3c142ee4be0f077f8b84593f1b24b35d14039e (diff) |
ARM: Add support for EP93xx SoCs
Add support for the Cirrus EP93xx platform
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Acked-by: Tom <Tom.Rix@windriver.com>
Diffstat (limited to 'cpu/arm920t/ep93xx/cpu.c')
-rw-r--r-- | cpu/arm920t/ep93xx/cpu.c | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/cpu/arm920t/ep93xx/cpu.c b/cpu/arm920t/ep93xx/cpu.c new file mode 100644 index 00000000000..1abb9c6faac --- /dev/null +++ b/cpu/arm920t/ep93xx/cpu.c @@ -0,0 +1,51 @@ +/* + * Cirrus Logic EP93xx CPU-specific support. + * + * Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net> + * + * Copyright (C) 2004, 2005 + * Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com> + * + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <asm/arch/ep93xx.h> +#include <asm/io.h> + +/* We reset the CPU by generating a 1-->0 transition on DeviceCfg bit 31. */ +extern void reset_cpu(ulong addr) +{ + struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE; + uint32_t value; + + /* Unlock DeviceCfg and set SWRST */ + writel(0xAA, &syscon->sysswlock); + value = readl(&syscon->devicecfg); + value |= SYSCON_DEVICECFG_SWRST; + writel(value, &syscon->devicecfg); + + /* Unlock DeviceCfg and clear SWRST */ + writel(0xAA, &syscon->sysswlock); + value = readl(&syscon->devicecfg); + value &= ~SYSCON_DEVICECFG_SWRST; + writel(value, &syscon->devicecfg); + + /* Dying... */ + while (1) + ; /* noop */ +} |