diff options
| author | Tom Rini <trini@konsulko.com> | 2021-08-02 21:35:50 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-08-02 21:35:50 -0400 |
| commit | 3b64774323298362f9833aac75bb4639b4f98999 (patch) | |
| tree | 34a6428754d442d5559a7131ff27225ec7c0663a /configs | |
| parent | 51aef405550e603ff702c034f0e2cd0f15bdf2bb (diff) | |
| parent | 9feb5bdcc07b27806df07fd6b9260bb5cdef072d (diff) | |
Merge https://source.denx.de/u-boot/custodians/u-boot-x86
- Fixed broken ICH SPI driver in software sequencer mode
- Added "m25p,fast-read" to SPI flash node for x86 boards
- Drop ROM_NEEDS_BLOBS and BUILD_ROM for x86 ROM builds
- Define a default TSC timer frequency for all x86 boards
- x86 MTRR MSR programming codes bug fixes
- x86 "hob" command bug fixes
- Don't program MTRR for DRAM for FSP1
- Move INIT_PHASE_END_FIRMWARE to FSP2
- Use external graphics card by default on Intel Crown Bay
- tangier: Fix DMA controller IRQ polarity in CSRT
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/crownbay_defconfig | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index 0258f31089..d7ee0fe45e 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -8,8 +8,8 @@ CONFIG_MAX_CPUS=2 CONFIG_DEFAULT_DEVICE_TREE="crownbay" CONFIG_VENDOR_INTEL=y CONFIG_TARGET_CROWNBAY=y +CONFIG_DISABLE_IGD=y CONFIG_SMP=y -CONFIG_HAVE_VGA_BIOS=y CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_MP_TABLE=y CONFIG_FIT=y @@ -46,6 +46,7 @@ CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CPU=y +# CONFIG_SPI_FLASH_SMART_HWCAPS is not set CONFIG_E1000=y CONFIG_SOUND=y CONFIG_SOUND_I8254=y |