summaryrefslogtreecommitdiff
path: root/configs/socfpga_stratix10_defconfig
diff options
context:
space:
mode:
authorLey Foon Tan <ley.foon.tan@intel.com>2019-03-22 01:24:01 +0800
committerMarek Vasut <marex@denx.de>2019-04-17 22:20:17 +0200
commit6cd7134e7309a53f015a402e52e5863f29e366fd (patch)
tree826c653c4a9efe0076dca4f88fc5217ad8413afc /configs/socfpga_stratix10_defconfig
parentb6f7ee5d1f980ffa63e22749e2deae6caa57227e (diff)
ddr: altera: Stratix10: Add multi-banks DRAM size check
Stratix 10 maps dram from 0 to 128GB. There is a 2GB hole in the memory for peripherals and other IO from 2GB to 4GB. However the dram controller ignores upper address bits for smaller dram configurations. Example: a 4GB dram maps to multiple locations, every 4GB on the address. Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'configs/socfpga_stratix10_defconfig')
0 files changed, 0 insertions, 0 deletions