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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-09-19 21:40:26 +0900
committerTom Rini <trini@konsulko.com>2016-09-19 15:20:09 -0400
commit9b1b6d42256a4c2e59c803afdbf90d39371e61ba (patch)
treef23016c6f6dab180ed5901a02f3ab80c3aaf23ce /configs/socfpga_arria5_defconfig
parent00709f56975e0fb08374c03aad21ac7d7e61acd0 (diff)
Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL"
This reverts commit 90c08d9e08c7a108ab904f3bbdeb558081757892. I took a closer look at this after the commit was applied, and found CONFIG_SYS_MALLOC_F_LEN=0x2000 was too much. 8KB memory for SPL is actually too big for some boards. Perhaps 0x800 is enough, but the situation varies board by board. Let's postpone our decision until we come up with a better idea. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'configs/socfpga_arria5_defconfig')
-rw-r--r--configs/socfpga_arria5_defconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index 1a63b66f29e..abb89b2e66b 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"