diff options
| author | Ye Li <ye.li@nxp.com> | 2017-08-09 22:26:19 -0500 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2017-11-03 02:37:08 +0800 |
| commit | 588bab19a0d24a507153d67e0ebb9e062eb13e4f (patch) | |
| tree | 2eac369c6b5494e867066d909c5be4e1ba699ac7 /configs/mx8qxp_lpddr4_arm2_android_defconfig | |
| parent | 4b5cfdea95c6dfbb0aac6c9fbf60ebc08869d658 (diff) | |
MLK-16181 imx8qm/qxp: Add dcache flush to M4 boot commands
For booting M4 running in DDR, we use fatload to load the image to DDR first.
The fatload will do a copy for block size unaligned data in the tail. Since the DDR
area is cachable, so this cause a memory coherence issue. Need to use dcache flush
command before booting the M4 core.
This patch enables the CONFIG_CMD_CACHE and add the dcache flush to M4 boot commands
no matter the M4 runs in DDR or TCM.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'configs/mx8qxp_lpddr4_arm2_android_defconfig')
| -rw-r--r-- | configs/mx8qxp_lpddr4_arm2_android_defconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/configs/mx8qxp_lpddr4_arm2_android_defconfig b/configs/mx8qxp_lpddr4_arm2_android_defconfig index 2c66841c29..57de5e6dfb 100644 --- a/configs/mx8qxp_lpddr4_arm2_android_defconfig +++ b/configs/mx8qxp_lpddr4_arm2_android_defconfig @@ -7,6 +7,7 @@ CONFIG_EFI_PARTITION=y CONFIG_CMD_IMPORTENV=n CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DM=y +CONFIG_CMD_CACHE=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y |