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| author | Santhosh Kumar K <s-k6@ti.com> | 2024-02-14 16:27:51 +0530 |
|---|---|---|
| committer | Francesco Dolcini <francesco.dolcini@toradex.com> | 2024-03-21 14:26:33 +0000 |
| commit | 6320dfe865862e3659d99423479ab42bef29f5c8 (patch) | |
| tree | 1d1ee6ce7170109099125eeff176d0819430b181 /configs/libretech_all_h3_cc_h5_defconfig | |
| parent | 3cfe9a07ac5440934fd6ffcda5b5e2e51ef04fc9 (diff) | |
arm: dts: k3-*-ddr: Add ss_cfg reg entry
Add ss_cfg memory region which maps the DDRSS configuration region
for the memory controller node.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Diffstat (limited to 'configs/libretech_all_h3_cc_h5_defconfig')
0 files changed, 0 insertions, 0 deletions