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authorShyam Saini <shyam.saini@amarulasolutions.com>2019-06-03 11:13:21 +0530
committerStefano Babic <sbabic@denx.de>2019-07-19 20:14:50 +0200
commit7a9a246c0d74a63a0bb4c7448f30e79e38e13d12 (patch)
tree46ee76f5648afdca4dbbd7daeb9ed6d7c49cf10c /configs/imx6qdl_icore_nand_defconfig
parent46e10e922a08b412bf5f6891d175b7210fe2b939 (diff)
configs: icore: Fix U-Boot proper loading from nand
SPL on Engicam i.Core M6 boards enabled DM, so it would require some malloc() pool before relocation in order to load U-Boot proper properly. So, enable SPL malloc() pool of 0x2000 size similarly like what we have used for icore mmc defconfigs. Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Diffstat (limited to 'configs/imx6qdl_icore_nand_defconfig')
-rw-r--r--configs/imx6qdl_icore_nand_defconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig
index 4ea0803ab5..4672563ff9 100644
--- a/configs/imx6qdl_icore_nand_defconfig
+++ b/configs/imx6qdl_icore_nand_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_MX6Q_ENGICAM=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
# CONFIG_CMD_BMODE is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y