diff options
author | Chris Brandt <chris.brandt@renesas.com> | 2017-08-23 14:53:59 -0500 |
---|---|---|
committer | Marek Vasut <marex@denx.de> | 2019-05-07 05:41:32 +0200 |
commit | ba932bc846e8f44b7b61fcaac41e0be907d1303e (patch) | |
tree | bc90d4a9923d4785063dfe2821db76b884158503 /configs/grpeach_defconfig | |
parent | 3529596442c9cf588b7b8a3e7573f0ff9d8ed350 (diff) |
ARM: dts: renesas: Add RZ/A1 GR-Peach board
Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach,
which is a cheap development platform with RZ/A1H SoC. The
DTs are imported from Linux 5.0.11, commit d5a2675b207d .
Currently supported are UART, ethernet and RPC SPI. The board
can be booted from RPC SPI by writing the u-boot.bin binary
to the beginning of the SPI NOR, e.g. using the "sf" command.
The board can also be booted via JTAG by setting text base to
0x20020000, loading u-boot.bin there via JTAG and executing it
from that address.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'configs/grpeach_defconfig')
-rw-r--r-- | configs/grpeach_defconfig | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig new file mode 100644 index 00000000000..32254b3b0e1 --- /dev/null +++ b/configs/grpeach_defconfig @@ -0,0 +1,53 @@ +CONFIG_ARM=y +# CONFIG_SPL_SYS_THUMB_BUILD is not set +CONFIG_ARCH_RMOBILE=y +CONFIG_SYS_TEXT_BASE=0x18000000 +CONFIG_RZA1=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_BOOTDELAY=3 +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_ELF is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_SF=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_SNTP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_MAC_PARTITION=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="r7s72100-gr-peach-u-boot" +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_ENV_SPI_BUS=y +CONFIG_ENV_SPI_BUS=0 +CONFIG_USE_ENV_SPI_CS=y +CONFIG_ENV_SPI_CS=0 +CONFIG_USE_ENV_SPI_MAX_HZ=y +CONFIG_ENV_SPI_MAX_HZ=50000000 +CONFIG_USE_ENV_SPI_MODE=y +CONFIG_ENV_SPI_MODE=0x0 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_HAVE_BLOCK_DEVICE=y +CONFIG_DM_GPIO=y +CONFIG_RZA1_GPIO=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +# CONFIG_MMC is not set +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_MACRONIX=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_DM_ETH=y +CONFIG_SH_ETHER=y +CONFIG_PINCTRL=y +CONFIG_SCIF_CONSOLE=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_RENESAS_RPC_SPI=y +CONFIG_TIMER=y +CONFIG_RENESAS_OSTM_TIMER=y +CONFIG_OF_LIBFDT_OVERLAY=y +# CONFIG_EFI_LOADER is not set |