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authorKever Yang <kever.yang@rock-chips.com>2018-11-09 11:21:38 +0800
committerKever Yang <kever.yang@rock-chips.com>2019-05-08 17:34:12 +0800
commitbdc00080111f6dc1e48586239e71e22665004aca (patch)
tree6061fa9be14408655da48eca26985d89d53dcef7 /configs/evb-rk3399_defconfig
parent82763349a25e45fe6978d3d6a058980d870936f5 (diff)
rockchip: rk3399: update defconfig for TPL
The SPL is now running at SDRAM, and 0x10000 is used by BL31, and the ARM SPL do not support relocate now, we need reserved 0x50000 so that it won't overwrite the code when we load the bl31 to target space. We should remove this after we enable the relocate feature. The SPL need malloc 0x9000 for MMC as buffer used for transfer data to IRAM(The EMMC DMA can not transfer data to IRAM directly). Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'configs/evb-rk3399_defconfig')
-rw-r--r--configs/evb-rk3399_defconfig7
1 files changed, 4 insertions, 3 deletions
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 8d57bdf335..5bb910e8d4 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -5,7 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xFF1A0000
@@ -17,11 +17,11 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_TEXT_BASE=0xff8c2000
CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
@@ -79,4 +79,5 @@ CONFIG_VIDEO_ROCKCHIP=y
CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
CONFIG_DISPLAY_ROCKCHIP_MIPI=y
CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y