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authorLukasz Majewski <lukma@denx.de>2018-05-11 16:51:13 +0200
committerStefano Babic <sbabic@denx.de>2018-06-18 15:44:21 +0200
commitea4584d73d731c49cc838cae3955a2ef92d5eff7 (patch)
tree3ada8bcf9f76f14d687d2d9a360e49901367defb /configs/display5_defconfig
parentb5f4543c92dd7be011b9729ee9c998c0e805c23e (diff)
display5: ddr: Enable support for DDR3 auto calibration
This code performs DDR3 memory calibration for display5 board. Signed-off-by: Lukasz Majewski <lukma@denx.de>
Diffstat (limited to 'configs/display5_defconfig')
-rw-r--r--configs/display5_defconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/configs/display5_defconfig b/configs/display5_defconfig
index aaf8529628..6ae6d05659 100644
--- a/configs/display5_defconfig
+++ b/configs/display5_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_MX6_DDRCAL=y
CONFIG_TARGET_DISPLAY5=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y