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authorSimon Glass <sjg@chromium.org>2016-01-17 16:11:23 -0700
committerBin Meng <bmeng.cn@gmail.com>2016-01-24 12:08:17 +0800
commitbba22a97a7e143560b137c9a2d9fcf6dbd038470 (patch)
treeff9fab403ba77b9ef830a31ebc0979802b03f864 /configs/chromebook_link_defconfig
parent9fd11c7a8ce8745fcfee4b86e6b9217f738d3ff4 (diff)
x86: ivybridge: Use common CPU init code
The existing ivybridge code predates the normal multi-core CPU init, and it is not used. Remove it and add CPU nodes to the device tree so that all four CPUs are set up. Also enable the 'cpu' command. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'configs/chromebook_link_defconfig')
-rw-r--r--configs/chromebook_link_defconfig3
1 files changed, 3 insertions, 0 deletions
diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
index baa0ed84be8..bcb34f509df 100644
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -5,7 +5,9 @@ CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
CONFIG_TARGET_CHROMEBOOK_LINK=y
CONFIG_HAVE_MRC=y
CONFIG_ENABLE_MRC_CACHE=y
+CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
+CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
@@ -17,6 +19,7 @@ CONFIG_CMD_BOOTSTAGE=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_TEST=y
CONFIG_OF_CONTROL=y
+CONFIG_CPU=y
CONFIG_CMD_CROS_EC=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_LPC=y