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authorPali Rohár <pali@kernel.org>2022-06-16 14:19:44 +0200
committerTom Rini <trini@konsulko.com>2022-06-28 09:40:02 -0400
commitc0f47562162f7f6ede331514ff2b59bff204a448 (patch)
tree3a6bd08b212e42c88486ad30df361c3c52b310ce /configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
parentea82ed8c2eaee0a0f7dee31016aaee4ce88e9ea7 (diff)
powerpc: mpc85xx: Set TEXT_BASE addresses to real base values
Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are manually increased by 0x1000 due to .bootpg section. This section has size of 0x1000 bytes and is manually put by linker script before .text section (and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Due to this fact lot of other config options are manually increased by 0x1000 value to make correct layout. Note that entry point is not on CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image). Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Put .bootpg code directly into .text section and move text base address to the start of .bootpg code. And finally remove +0x1000 value from lot of config options. With this removal custom PHDRS is not used anymore, so remove it too. After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at address -0x1000 anymore. Tested on P2020 board with SPL and proper U-Boot. Signed-off-by: Pali Rohár <pali@kernel.org>
Diffstat (limited to 'configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig')
-rw-r--r--configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig6
1 files changed, 3 insertions, 3 deletions
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 10fecbbbf1..6fcbce4d67 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -1,5 +1,5 @@
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11001000
+CONFIG_SYS_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -7,7 +7,7 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
-CONFIG_SPL_TEXT_BASE=0xf8f81000
+CONFIG_SPL_TEXT_BASE=0xf8f80000
CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -21,7 +21,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000
+CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000
CONFIG_SPIFLASH=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y