diff options
| author | Tom Rini <trini@konsulko.com> | 2019-05-26 14:45:25 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-05-26 14:45:25 -0400 |
| commit | 344a0e4367d0820b8eb2ea4a90132433e038095f (patch) | |
| tree | bf58156bdb467305dac74f175f5c81ef615d49ac /configs/MPC8349EMDS_defconfig | |
| parent | cc1e98b559e46630c3421a7762d02a58e5480926 (diff) | |
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'configs/MPC8349EMDS_defconfig')
| -rw-r--r-- | configs/MPC8349EMDS_defconfig | 47 |
1 files changed, 21 insertions, 26 deletions
diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig index bb0d166e4d..9cd3daab35 100644 --- a/configs/MPC8349EMDS_defconfig +++ b/configs/MPC8349EMDS_defconfig @@ -53,6 +53,25 @@ CONFIG_LBLAW1=y CONFIG_LBLAW1_BASE=0xE2400000 CONFIG_LBLAW1_NAME="BCSR" CONFIG_LBLAW1_LENGTH_32_KBYTES=y +CONFIG_ELBC_BR0_OR0=y +CONFIG_BR0_OR0_NAME="FLASH" +CONFIG_BR0_OR0_BASE=0xFE000000 +CONFIG_BR0_PORTSIZE_16BIT=y +CONFIG_OR0_AM_32_MBYTES=y +CONFIG_OR0_XAM_SET=y +CONFIG_OR0_SCY_15=y +CONFIG_OR0_CSNT_EARLIER=y +CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y +CONFIG_OR0_XACS_EXTENDED=y +CONFIG_OR0_TRLX_RELAXED=y +CONFIG_OR0_EHTR_8_CYCLE=y +CONFIG_OR0_EAD_EXTRA=y +CONFIG_ELBC_BR1_OR1=y +CONFIG_BR1_OR1_NAME="BCSR" +CONFIG_BR1_OR1_BASE=0xE2400000 +CONFIG_OR1_XAM_SET=y +CONFIG_OR1_SCY_15=y +CONFIG_OR1_CSNT_EARLIER=y CONFIG_HID0_FINAL_EMCP=y CONFIG_HID0_FINAL_ICE=y CONFIG_HID2_HBE=y @@ -60,6 +79,8 @@ CONFIG_ACR_PIPE_DEP_4=y CONFIG_ACR_RPTCNT_4=y CONFIG_SPCR_TSEC1EP_3=y CONFIG_SPCR_TSEC2EP_3=y +CONFIG_LCRR_DBYP_PLL_BYPASSED=y +CONFIG_LCRR_CLKDIV_4=y CONFIG_PCI_ONE_PCI1=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -83,29 +104,3 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_MPC8XXX_SPI=y CONFIG_OF_LIBFDT=y -CONFIG_ELBC_BR0_OR0=y -CONFIG_BR0_OR0_NAME="FLASH" -CONFIG_BR0_OR0_BASE=0xFE000000 -CONFIG_BR0_MACHINE_GPCM=y -CONFIG_BR0_PORTSIZE_16BIT=y -CONFIG_OR0_AM_32_MBYTES=y -CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y -CONFIG_OR0_CSNT_EARLIER=y -CONFIG_OR0_EAD_EXTRA=y -CONFIG_OR0_SCY_15=y -CONFIG_OR0_XACS_EXTENDED=y -CONFIG_OR0_XAM_SET=y -CONFIG_OR0_TRLX_RELAXED=y -CONFIG_OR0_EHTR_8_CYCLE=y -CONFIG_ELBC_BR1_OR1=y -CONFIG_BR1_OR1_NAME="BCSR" -CONFIG_BR1_OR1_BASE=0xE2400000 -CONFIG_BR1_MACHINE_GPCM=y -CONFIG_BR1_PORTSIZE_8BIT=y -CONFIG_OR1_AM_32_KBYTES=y -CONFIG_OR1_CSNT_EARLIER=y -CONFIG_OR1_SCY_15=y -CONFIG_OR1_XAM_SET=y -CONFIG_OR1_EHTR_NORMAL=y -CONFIG_LCRR_DBYP_PLL_BYPASSED=y -CONFIG_LCRR_CLKDIV_4=y |