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authorPeter Tyser <ptyser@xes-inc.com>2009-04-18 22:34:03 -0500
committerWolfgang Denk <wd@denx.de>2009-06-12 20:39:46 +0200
commit0f89c54be92773b23d66ac401ba6acb6144100c3 (patch)
tree60f51c10ce10d8525fd635a1f99e76707221f4d0 /common
parentd48eb5131d287f52bb85b4c58c8680a2e8e3b641 (diff)
i2c: Update references to individual i2c commands
The individual i2c commands imd, imm, inm, imw, icrc32, iprobe, iloop, and isdram are no longer available so all references to them have been updated to the new form of "i2c <cmd>". Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Diffstat (limited to 'common')
-rw-r--r--common/cmd_i2c.c27
1 files changed, 11 insertions, 16 deletions
diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
index fd9f9a44f81..903856d2d57 100644
--- a/common/cmd_i2c.c
+++ b/common/cmd_i2c.c
@@ -27,11 +27,6 @@
* There are several parameters in many of the commands that bear further
* explanations:
*
- * Two of the commands (imm and imw) take a byte/word/long modifier
- * (e.g. imm.w specifies the word-length modifier). This was done to
- * allow manipulating word-length registers. It was not done on any other
- * commands because it was not deemed useful.
- *
* {i2c_chip} is the I2C chip address (the first byte sent on the bus).
* Each I2C chip on the bus has a unique address. On the I2C data bus,
* the address is the upper seven bits and the LSB is the "read/write"
@@ -69,11 +64,11 @@
* {addr} field (since .1 is the default, it doesn't actually have to
* be specified). Examples: given a memory chip at I2C chip address
* 0x50, the following would happen...
- * imd 50 0 10 display 16 bytes starting at 0x000
+ * i2c md 50 0 10 display 16 bytes starting at 0x000
* On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
- * imd 50 100 10 display 16 bytes starting at 0x100
+ * i2c md 50 100 10 display 16 bytes starting at 0x100
* On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
- * imd 50 210 10 display 16 bytes starting at 0x210
+ * i2c md 50 210 10 display 16 bytes starting at 0x210
* On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
* This is awfully ugly. It would be nice if someone would think up
* a better way of handling this.
@@ -158,7 +153,7 @@ int i2c_set_bus_speed(unsigned int)
/*
* Syntax:
- * imd {i2c_chip} {addr}{.0, .1, .2} {len}
+ * i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
*/
#define DISP_LINE_LEN 16
@@ -275,7 +270,7 @@ int do_i2c_nm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/* Write (fill) memory
*
* Syntax:
- * imw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
+ * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
*/
int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@@ -359,7 +354,7 @@ int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/* Calculate a CRC on memory
*
* Syntax:
- * icrc32 {i2c_chip} {addr}{.0, .1, .2} {count}
+ * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
*/
int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@@ -428,8 +423,8 @@ int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/* Modify memory.
*
* Syntax:
- * imm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
- * inm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
+ * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
+ * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
*/
static int
@@ -562,7 +557,7 @@ mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
/*
* Syntax:
- * iprobe {addr}{.0, .1, .2}
+ * i2c probe {addr}{.0, .1, .2}
*/
int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@@ -604,7 +599,7 @@ int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/*
* Syntax:
- * iloop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
+ * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
* {length} - Number of bytes to read
* {delay} - A DECIMAL number and defaults to 1000 uSec
*/
@@ -726,7 +721,7 @@ static void decode_bits (u_char const b, char const *str[], int const do_once)
/*
* Syntax:
- * sdram {i2c_chip}
+ * i2c sdram {i2c_chip}
*/
int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{