diff options
| author | Tom Warren <twarren@nvidia.com> | 2011-11-16 16:38:34 -0700 |
|---|---|---|
| committer | Gerrit <chrome-bot@google.com> | 2011-11-18 00:00:45 -0800 |
| commit | 318c9b21768d937e4a8984af86fec6fcd02242f2 (patch) | |
| tree | 7f76b9915570a9e1d1c8d3cf16d318676ba2764b /common | |
| parent | e0a72afdcd769abd7ac3465d86e45bc0ccd95833 (diff) | |
arm: Tegra3: complete 408MHz PLLP init
Signed-off-by: Tom Warren <twarren@nvidia.com>
BUG=chromium-os:21033
TEST=Built and booted OK on my Waluigi. UART is OK, mmc, spi, i2c OK.
Note that this is only valid with CONFIG_SYS_PLLP_BASE_IS_408MHZ.
No affect on Tegra2. Seaboard builds fine, BTW.
Change-Id: I05a367afd1e78a2170d7308a658ce64017850ca0
Reviewed-on: https://gerrit.chromium.org/gerrit/11811
Tested-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Ready: Che-Liang Chiou <clchiou@chromium.org>
Diffstat (limited to 'common')
| -rw-r--r-- | common/fdt_decode.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/common/fdt_decode.c b/common/fdt_decode.c index 1e32ad9dbf..b6beebda69 100644 --- a/common/fdt_decode.c +++ b/common/fdt_decode.c @@ -307,7 +307,9 @@ int fdt_decode_uart_console(const void *blob, struct fdt_uart *uart, uart->silent = fdt_decode_get_config_int(blob, "silent_console", 0); uart->io_mapped = get_int(blob, node, "io-mapped", 0); uart->compat = fdt_decode_lookup(blob, node); - +#if !defined(CONFIG_SYS_PLLP_BASE_IS_408MHZ) + uart->clock_freq = 216000000; +#endif /* Calculate divisor if required */ if ((uart->divisor == -1) && (uart->clock_freq != -1)) fdt_decode_uart_calc_divisor(uart); |