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authorTom Wai-Hong Tam <waihong@chromium.org>2011-07-22 19:02:38 +0800
committerSimon Glass <sjg@chromium.org>2011-08-29 10:59:06 -0700
commit889e854df63823a1ed8881447f3b9ab2d40170b3 (patch)
tree7a1ce169964ab9a4ad9a2f3b7d8fb9f8d391126a /common/cmd_vboot_test.c
parent24c39dcba4d08725b134a44fa3bcd0443fd51a37 (diff)
CHROMIUM: Add lid_open switch and power_key switch to fdt and add a test
BUG=chrome-os-partner:4738 TEST=build without error, run "vboot_test gpio" on Aebl Tegra2 # vboot_test gpio cros_gpio: wpsw : port= 59, polarity=0, value=1 cros_gpio: recsw : port= 56, polarity=0, value=0 cros_gpio: devsw : port=168, polarity=1, value=0 cros_gpio: lidsw : port= 23, polarity=0, value=1 cros_gpio: pwrsw : port=170, polarity=0, value=0 --- Pressed the power key --- Tegra2 # vboot_test gpio cros_gpio: wpsw : port= 59, polarity=0, value=1 cros_gpio: recsw : port= 56, polarity=0, value=0 cros_gpio: devsw : port=168, polarity=1, value=0 cros_gpio: lidsw : port= 23, polarity=0, value=1 cros_gpio: pwrsw : port=170, polarity=0, value=1 --- Closed the lid --- Tegra2 # vboot_test gpio cros_gpio: wpsw : port= 59, polarity=0, value=1 cros_gpio: recsw : port= 56, polarity=0, value=0 cros_gpio: devsw : port=168, polarity=1, value=0 cros_gpio: lidsw : port= 23, polarity=0, value=0 cros_gpio: pwrsw : port=170, polarity=0, value=0 Change-Id: Ib9fe188f39e266f806a823e694d8ea0867a8ef19 Reviewed-on: http://gerrit.chromium.org/gerrit/4485 Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org>
Diffstat (limited to 'common/cmd_vboot_test.c')
-rw-r--r--common/cmd_vboot_test.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/common/cmd_vboot_test.c b/common/cmd_vboot_test.c
index 68b09113df..501f92c7e2 100644
--- a/common/cmd_vboot_test.c
+++ b/common/cmd_vboot_test.c
@@ -14,6 +14,8 @@
#include <common.h>
#include <command.h>
+#include <chromeos/cros_gpio.h>
+#include <chromeos/fdt_decode.h>
#include <chromeos/firmware_storage.h>
#include <chromeos/memory_wipe.h>
#include <vboot_api.h>
@@ -25,6 +27,8 @@
#define TEST_FW_START 0xbfc00
#define TEST_FW_LENGTH 0x1000
+DECLARE_GLOBAL_DATA_PTR;
+
static int do_vboot_test_fwrw(cmd_tbl_t *cmdtp,
int flag, int argc, char * const argv[])
{
@@ -110,6 +114,26 @@ static int do_vboot_test_memwipe(cmd_tbl_t *cmdtp,
return 0;
}
+static int do_vboot_test_gpio(cmd_tbl_t *cmdtp,
+ int flag, int argc, char * const argv[])
+{
+ void *fdt_ptr = (void *)gd->blob;
+ cros_gpio_t gpio;
+ int i;
+
+ for (i = 0; i < CROS_GPIO_MAX_GPIO; i++) {
+ if (cros_gpio_fetch(i, fdt_ptr, &gpio)) {
+ VbExDebug("Failed to fetch GPIO, %d!\n", i);
+ return 1;
+ }
+ if (cros_gpio_dump(&gpio)) {
+ VbExDebug("Failed to dump GPIO, %d!\n", i);
+ return 1;
+ }
+ }
+ return 0;
+}
+
static int do_vboot_test_all(cmd_tbl_t *cmdtp,
int flag, int argc, char * const argv[])
{
@@ -117,6 +141,7 @@ static int do_vboot_test_all(cmd_tbl_t *cmdtp,
ret |= do_vboot_test_fwrw(cmdtp, flag, argc, argv);
ret |= do_vboot_test_memwipe(cmdtp, flag, argc, argv);
+ ret |= do_vboot_test_gpio(cmdtp, flag, argc, argv);
return ret;
}
@@ -125,6 +150,7 @@ static cmd_tbl_t cmd_vboot_test_sub[] = {
U_BOOT_CMD_MKENT(all, 0, 1, do_vboot_test_all, "", ""),
U_BOOT_CMD_MKENT(fwrw, 0, 1, do_vboot_test_fwrw, "", ""),
U_BOOT_CMD_MKENT(memwipe, 0, 1, do_vboot_test_memwipe, "", ""),
+ U_BOOT_CMD_MKENT(gpio, 0, 1, do_vboot_test_gpio, "", ""),
};
static int do_vboot_test(cmd_tbl_t *cmdtp,
@@ -150,5 +176,6 @@ U_BOOT_CMD(vboot_test, CONFIG_SYS_MAXARGS, 1, do_vboot_test,
"all - perform all tests\n"
"vboot_test fwrw - test the firmware read/write functions\n"
"vboot_test memwipe - test the memory wipe functions\n"
+ "vboot_test gpio - print the status of gpio\n"
);