diff options
| author | Vaibhav Hiremath <hvaibhav@ti.com> | 2009-06-13 01:14:53 +0530 |
|---|---|---|
| committer | Justin Waters <justin.waters@timesys.com> | 2009-10-21 16:46:33 -0400 |
| commit | b33eaa47208ec3af96ffece0877959dd66e2d910 (patch) | |
| tree | ee60d8a32b0b09f63997392d9ef37735e1afee56 /board | |
| parent | 97f4a40fddabef9bdf195b7668a0220e4f29cb82 (diff) | |
OMAP3517PRE-ALPHA: validated on OMAP3517PRE_ALPHA board
OMAP3517 Pre-Alpha board is a development platform
used before actual OMAP3517EVM board, below are the details -
Validation -
- PLL conifguration
- NAND 16-bit micron part (x-loader, u-boot, Linux)
- MMC1 (x-loader, u-boot, Linux)
- Video (LCD (4.3" Sharp part))
- Complete NAND boot mode
- Complete MMC boot mode
Changes -
- GPMC Timing parameters for NAND interface
- UART3 made as serial console
Issues -
- Clock init code still need to be cleaned up.
- boot config code needs to changed for supporting both mmc and nand
boot
Diffstat (limited to 'board')
| -rw-r--r-- | board/omap3/omap3517evm/omap3517evm.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/board/omap3/omap3517evm/omap3517evm.h b/board/omap3/omap3517evm/omap3517evm.h index d817e9373d..000fde6105 100644 --- a/board/omap3/omap3517evm/omap3517evm.h +++ b/board/omap3/omap3517evm/omap3517evm.h @@ -241,7 +241,7 @@ static void setup_net_chip(void); MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)) /*MCBSP1_FSX*/\ MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)) /*MCBSP1_CLKX */\ /*Serial Interface*/\ - MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)) /*UART3_CTS_*/\ + MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTU | DIS | M0)) /*UART3_CTS_*/\ /* RCTX*/\ MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) /*UART3_RTS_SD */\ MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /*UART3_RX_IRRX*/\ @@ -279,8 +279,8 @@ static void setup_net_chip(void); MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) /*McSPI2_CLK*/\ MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) /*McSPI2_SIMO*/\ MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) /*McSPI2_SOMI*/\ - MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M0)) /*McSPI2_CS0*/\ - MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)) /*McSPI2_CS1*/\ + MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M4)) /*McSPI2_CS0*/\ + MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M4)) /*McSPI2_CS1*/\ /*Control and debug */\ MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\ MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\ |