diff options
| author | Benoît Thébaudeau <benoit.thebaudeau@advansee.com> | 2012-09-27 10:19:58 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2012-10-15 11:54:10 -0700 |
| commit | 833b6435de3e8cf5b06ba81cb1b2b50e044269ff (patch) | |
| tree | 850355b18c47bcf2b56a12fe4424f067e0491460 /board | |
| parent | e7bed5c2b30c894666e43b68a3d7b8e8f91da50d (diff) | |
mx5/6: Define default SoC input clock frequencies
Define default SoC input clock frequencies for i.MX5/6 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/mx53loco/mx53loco.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index 8f821255902..65432099a1e 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -394,7 +394,7 @@ static int power_init(void) static void clock_1GHz(void) { int ret; - u32 ref_clk = CONFIG_SYS_MX5_HCLK; + u32 ref_clk = MXC_HCLK; /* * After increasing voltage to 1.25V, we can switch * CPU clock to 1GHz and DDR to 400MHz safely |