diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2012-01-12 14:58:40 -0800 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2012-01-12 16:11:41 -0800 |
| commit | 5ae1ff1f2ea2e5587ad72936d4a009c77ff017b6 (patch) | |
| tree | 75a982ab728496bf1daa00ae684951daf10e7a6b /board | |
| parent | 05b430f802457353f134f231f87e28ac74d5c697 (diff) | |
CHROMIUM: x86: Align the header for the MRC data cache.
This is to match a change made in coreboot to align both
the header and the data to 16 bytes.
BUG=none
TEST=several cold boots to ensure that the MRC
data cache is not written out on every boot.
Change-Id: I6c9a01933264d6bd65958ddb93e8944c35e853c6
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/14096
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Diffstat (limited to 'board')
| -rw-r--r-- | board/chromebook-x86/coreboot/coreboot.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/board/chromebook-x86/coreboot/coreboot.c b/board/chromebook-x86/coreboot/coreboot.c index 2b3d11b12e..1be0b8e1d1 100644 --- a/board/chromebook-x86/coreboot/coreboot.c +++ b/board/chromebook-x86/coreboot/coreboot.c @@ -107,9 +107,10 @@ void setup_pcat_compatibility() #define MRC_DATA_ALIGN 0x1000 struct mrc_data_container { - u32 mrc_signature; + u32 mrc_signature; /* 'MRCD' */ u32 mrc_data_size; /* Actual total size of this structure */ - u16 mrc_checksum; + u32 mrc_checksum; /* IP style checksum */ + u32 reserved; /* For header alignment */ u8 mrc_data[0]; /* Variable size, platform/run time dependent */ } __packed; |