diff options
| author | Ye Li <ye.li@nxp.com> | 2018-10-29 21:48:38 -0700 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@nxp.com> | 2018-11-02 20:50:07 -0500 |
| commit | 706b1a41b73d9604d4a590173f86fb398a908406 (patch) | |
| tree | 30f6710e07bffd00cfff2e7399357b3b469a9c37 /board | |
| parent | 4404440535e3ecdb645e68b69f66c475aa56dd05 (diff) | |
MLK-20116-3 mx7ulp_evk: Remove GPIO codes for USB ID
The iMX7ULP B0 chip has added more pins for muxing USB ID. The A3 board
follows it to exploit PTC13 for USB ID, so we don't need to use GPIO
any longer. The USB driver can recognize the USB mode from USB PHY.
After this change, old boards with design using GPIO for USB mode won't
be supported.
Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/mx7ulp_evk/mx7ulp_evk.c | 35 |
1 files changed, 0 insertions, 35 deletions
diff --git a/board/freescale/mx7ulp_evk/mx7ulp_evk.c b/board/freescale/mx7ulp_evk/mx7ulp_evk.c index cc630ea22a6..e92b8c22e6c 100644 --- a/board/freescale/mx7ulp_evk/mx7ulp_evk.c +++ b/board/freescale/mx7ulp_evk/mx7ulp_evk.c @@ -85,37 +85,6 @@ int board_qspi_init(void) } #endif -#ifdef CONFIG_DM_USB -static iomux_cfg_t const usb_otg1_pads[] = { - MX7ULP_PAD_PTC8__PTC8 | MUX_PAD_CTRL(OTG_ID_GPIO_PAD_CTRL), /* gpio for OTG ID*/ -}; - -static void setup_usb(void) -{ - mx7ulp_iomux_setup_multiple_pads(usb_otg1_pads, - ARRAY_SIZE(usb_otg1_pads)); - - gpio_request(IMX_GPIO_NR(3, 8), "otg_id"); - gpio_direction_input(IMX_GPIO_NR(3, 8)); -} - -int board_ehci_usb_phy_mode(struct udevice *dev) -{ - int ret = 0; - - if (devfdt_get_addr(dev) == USBOTG0_RBASE) { - ret = gpio_get_value(IMX_GPIO_NR(3, 8)); - - if (ret) - return USB_INIT_DEVICE; - else - return USB_INIT_HOST; - } - - return USB_INIT_HOST; -} -#endif - int board_early_init_f(void) { setup_iomux_uart(); @@ -216,10 +185,6 @@ int board_init(void) board_qspi_init(); #endif -#ifdef CONFIG_DM_USB - setup_usb(); -#endif - return 0; } |