diff options
| author | Simon Glass <sjg@chromium.org> | 2011-04-28 10:03:35 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2011-08-24 09:54:52 -0700 |
| commit | 1640039ca2f8a4b9ca04106295cc8dfd6c97a82e (patch) | |
| tree | e21c8a01ff4d26e225448d21c58b9459e22a9949 /board | |
| parent | a52bb945e05058079275a208bee2515ca353cd1f (diff) | |
Tegra2: add additional pin multiplexing features
This adds an enum for each pin and some functions for changing the pin
muxing setup.
BUG=chromium-os:13875
TEST=Build U-Boot for seaboard, boot
Change-Id: Ic9b4b035cc0584d1391c0a8e3e4646fc532e8ec3
Review URL: http://codereview.chromium.org/6895010
Diffstat (limited to 'board')
| -rw-r--r-- | board/nvidia/common/board.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 12e79ae3be5..f07328ebb97 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -140,19 +140,15 @@ static void pin_mux_uart(void) reg &= 0xFFF0FFFF; /* IRRX_/IRTX_SEL [19:16] = 00 UARTA */ writel(reg, &pmt->pmt_ctl_c); - reg = readl(&pmt->pmt_tri_a); - reg &= ~Z_IRRX; /* Z_IRRX = normal (0) */ - reg &= ~Z_IRTX; /* Z_IRTX = normal (0) */ - writel(reg, &pmt->pmt_tri_a); + pinmux_tristate_disable(PIN_IRRX); + pinmux_tristate_disable(PIN_IRTX); #endif /* CONFIG_TEGRA2_ENABLE_UARTA */ #if defined(CONFIG_TEGRA2_ENABLE_UARTD) reg = readl(&pmt->pmt_ctl_b); reg &= 0xFFFFFFF3; /* GMC_SEL [3:2] = 00, UARTD */ writel(reg, &pmt->pmt_ctl_b); - reg = readl(&pmt->pmt_tri_a); - reg &= ~Z_GMC; /* Z_GMC = normal (0) */ - writel(reg, &pmt->pmt_tri_a); + pinmux_tristate_disable(PIN_GMC); #endif /* CONFIG_TEGRA2_ENABLE_UARTD */ } |