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authorEmanuele Ghidoli <emanuele.ghidoli@toradex.com>2023-12-01 14:36:20 +0100
committerEmanuele Ghidoli <emanuele.ghidoli@toradex.com>2023-12-01 14:36:20 +0100
commitff20984bc78933c081ab8f22a84dde8cdb38e8b9 (patch)
treec626e16fdb2e6d51a7dbc27bad5a556a8549ea4a /board
parent536d0d5eef241a80a352704d82f2284faac2b046 (diff)
parent71b8c840ca61a4e11b2cdf63b0e6580ecb427912 (diff)
Merge tag '09.01.00.006' into toradex_ti-09.01.00.006
RC Release 09.01.00.006
Diffstat (limited to 'board')
-rw-r--r--board/ti/am57xx/board.c313
-rw-r--r--board/ti/am62ax/evm.c5
-rw-r--r--board/ti/am62ax/rm-cfg.yaml524
-rw-r--r--board/ti/am62px/Kconfig52
-rw-r--r--board/ti/am62px/MAINTAINERS9
-rw-r--r--board/ti/am62px/Makefile7
-rw-r--r--board/ti/am62px/am62px.env27
-rw-r--r--board/ti/am62px/board-cfg.yaml36
-rw-r--r--board/ti/am62px/evm.c35
-rw-r--r--board/ti/am62px/pm-cfg.yaml12
-rw-r--r--board/ti/am62px/rm-cfg.yaml987
-rw-r--r--board/ti/am62px/sec-cfg.yaml378
-rw-r--r--board/ti/am62px/tifs-rm-cfg.yaml879
-rw-r--r--board/ti/am62x/am625_beagleplay_android.env25
-rw-r--r--board/ti/am62x/am62x.env4
-rw-r--r--board/ti/am62x/evm.c53
-rw-r--r--board/ti/am62x/rm-cfg.yaml483
-rw-r--r--board/ti/am64x/am64x.env9
-rw-r--r--board/ti/am64x/evm.c26
-rw-r--r--board/ti/common/Kconfig8
-rw-r--r--board/ti/common/board_detect.c2
-rw-r--r--board/ti/common/rtc.c47
-rw-r--r--board/ti/j721e/evm.c9
-rw-r--r--board/ti/j721e/j721e.env4
-rw-r--r--board/ti/j721s2/evm.c98
-rw-r--r--board/ti/j721s2/j721s2.env2
-rw-r--r--board/ti/j784s4/evm.c82
-rw-r--r--board/ti/j784s4/j784s4.env19
28 files changed, 3444 insertions, 691 deletions
diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index 9ea507a8e9..7d7a88509a 100644
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -194,6 +194,162 @@ static const u32 beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs[] = {
0x0
};
+static const u32 AM571x_DDR3L_666MHz_TI_AM571x_IDK_emif1_ext_phy_regs[] = {
+ 0x04040100, /* EMIF1_EXT_PHY_CTRL_1 */
+ 0x006B00C0, /* EMIF1_EXT_PHY_CTRL_2 */
+ 0x006B00BC, /* EMIF1_EXT_PHY_CTRL_3 */
+ 0x006B00C7, /* EMIF1_EXT_PHY_CTRL_4 */
+ 0x006B00C3, /* EMIF1_EXT_PHY_CTRL_5 */
+ 0x006B00D1, /* EMIF1_EXT_PHY_CTRL_6 */
+ 0x002F002F, /* EMIF1_EXT_PHY_CTRL_7 */
+ 0x002F002F, /* EMIF1_EXT_PHY_CTRL_8 */
+ 0x002F002F, /* EMIF1_EXT_PHY_CTRL_9 */
+ 0x002F002F, /* EMIF1_EXT_PHY_CTRL_10 */
+ 0x002F002F, /* EMIF1_EXT_PHY_CTRL_11 */
+ 0x00600071, /* EMIF1_EXT_PHY_CTRL_12 */
+ 0x00600075, /* EMIF1_EXT_PHY_CTRL_13 */
+ 0x0060007E, /* EMIF1_EXT_PHY_CTRL_14 */
+ 0x00600082, /* EMIF1_EXT_PHY_CTRL_15 */
+ 0x00600086, /* EMIF1_EXT_PHY_CTRL_16 */
+ 0x00400051, /* EMIF1_EXT_PHY_CTRL_17 */
+ 0x00400055, /* EMIF1_EXT_PHY_CTRL_18 */
+ 0x0040005E, /* EMIF1_EXT_PHY_CTRL_19 */
+ 0x00400062, /* EMIF1_EXT_PHY_CTRL_20 */
+ 0x00400066, /* EMIF1_EXT_PHY_CTRL_21 */
+ 0x00800080, /* EMIF1_EXT_PHY_CTRL_22 */
+ 0x00800080, /* EMIF1_EXT_PHY_CTRL_23 */
+ 0x40010080, /* EMIF1_EXT_PHY_CTRL_24 */
+ 0x08102040, /* EMIF1_EXT_PHY_CTRL_25 */
+ 0x000000B0, /* EMIF1_EXT_PHY_CTRL_26 */
+ 0x000000AC, /* EMIF1_EXT_PHY_CTRL_27 */
+ 0x000000B7, /* EMIF1_EXT_PHY_CTRL_28 */
+ 0x000000B3, /* EMIF1_EXT_PHY_CTRL_29 */
+ 0x000000C1, /* EMIF1_EXT_PHY_CTRL_30 */
+ 0x00000041, /* EMIF1_EXT_PHY_CTRL_31 */
+ 0x00000045, /* EMIF1_EXT_PHY_CTRL_32 */
+ 0x0000004E, /* EMIF1_EXT_PHY_CTRL_33 */
+ 0x00000052, /* EMIF1_EXT_PHY_CTRL_34 */
+ 0x00000056, /* EMIF1_EXT_PHY_CTRL_35 */
+ 0x00000077 /* EMIF1_EXT_PHY_CTRL_36 */
+};
+
+static const u32 AM572x_DDR3L_532MHz_TI_AM572x_EVM_emif1_ext_phy_regs[] = {
+ 0x04040100, /* EMIF1_EXT_PHY_CTRL_1 */
+ 0x006B0081, /* EMIF1_EXT_PHY_CTRL_2 */
+ 0x006B0080, /* EMIF1_EXT_PHY_CTRL_3 */
+ 0x006B0086, /* EMIF1_EXT_PHY_CTRL_4 */
+ 0x006B0084, /* EMIF1_EXT_PHY_CTRL_5 */
+ 0x006B006B, /* EMIF1_EXT_PHY_CTRL_6 */
+ 0x00320032, /* EMIF1_EXT_PHY_CTRL_7 */
+ 0x00320032, /* EMIF1_EXT_PHY_CTRL_8 */
+ 0x00320032, /* EMIF1_EXT_PHY_CTRL_9 */
+ 0x00320032, /* EMIF1_EXT_PHY_CTRL_10 */
+ 0x00320032, /* EMIF1_EXT_PHY_CTRL_11 */
+ 0x00600065, /* EMIF1_EXT_PHY_CTRL_12 */
+ 0x00600066, /* EMIF1_EXT_PHY_CTRL_13 */
+ 0x0060006A, /* EMIF1_EXT_PHY_CTRL_14 */
+ 0x0060006C, /* EMIF1_EXT_PHY_CTRL_15 */
+ 0x00600060, /* EMIF1_EXT_PHY_CTRL_16 */
+ 0x00400045, /* EMIF1_EXT_PHY_CTRL_17 */
+ 0x00400046, /* EMIF1_EXT_PHY_CTRL_18 */
+ 0x0040004A, /* EMIF1_EXT_PHY_CTRL_19 */
+ 0x0040004C, /* EMIF1_EXT_PHY_CTRL_20 */
+ 0x00400040, /* EMIF1_EXT_PHY_CTRL_21 */
+ 0x00800080, /* EMIF1_EXT_PHY_CTRL_22 */
+ 0x00800080, /* EMIF1_EXT_PHY_CTRL_23 */
+ 0x40010080, /* EMIF1_EXT_PHY_CTRL_24 */
+ 0x08102040, /* EMIF1_EXT_PHY_CTRL_25 */
+ 0x00000071, /* EMIF1_EXT_PHY_CTRL_26 */
+ 0x00000070, /* EMIF1_EXT_PHY_CTRL_27 */
+ 0x00000076, /* EMIF1_EXT_PHY_CTRL_28 */
+ 0x00000074, /* EMIF1_EXT_PHY_CTRL_29 */
+ 0x00000000, /* EMIF1_EXT_PHY_CTRL_30 */
+ 0x00000035, /* EMIF1_EXT_PHY_CTRL_31 */
+ 0x00000036, /* EMIF1_EXT_PHY_CTRL_32 */
+ 0x0000003A, /* EMIF1_EXT_PHY_CTRL_33 */
+ 0x0000003C, /* EMIF1_EXT_PHY_CTRL_34 */
+ 0x00000000, /* EMIF1_EXT_PHY_CTRL_35 */
+ 0x00000077 /* EMIF1_EXT_PHY_CTRL_36 */
+};
+
+static const u32 AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif1_ext_phy_regs[] = {
+ 0x04040100, /* EMIF1_EXT_PHY_CTRL_1 */
+ 0x006B00AF, /* EMIF1_EXT_PHY_CTRL_2 */
+ 0x006B00AB, /* EMIF1_EXT_PHY_CTRL_3 */
+ 0x006B00B4, /* EMIF1_EXT_PHY_CTRL_4 */
+ 0x006B00B1, /* EMIF1_EXT_PHY_CTRL_5 */
+ 0x006B00BD, /* EMIF1_EXT_PHY_CTRL_6 */
+ 0x00320032, /* EMIF1_EXT_PHY_CTRL_7 */
+ 0x00320032, /* EMIF1_EXT_PHY_CTRL_8 */
+ 0x00320032, /* EMIF1_EXT_PHY_CTRL_9 */
+ 0x00320032, /* EMIF1_EXT_PHY_CTRL_10 */
+ 0x00320032, /* EMIF1_EXT_PHY_CTRL_11 */
+ 0x0060006E, /* EMIF1_EXT_PHY_CTRL_12 */
+ 0x00600071, /* EMIF1_EXT_PHY_CTRL_13 */
+ 0x00600078, /* EMIF1_EXT_PHY_CTRL_14 */
+ 0x0060007B, /* EMIF1_EXT_PHY_CTRL_15 */
+ 0x0060007F, /* EMIF1_EXT_PHY_CTRL_16 */
+ 0x0040004E, /* EMIF1_EXT_PHY_CTRL_17 */
+ 0x00400051, /* EMIF1_EXT_PHY_CTRL_18 */
+ 0x00400058, /* EMIF1_EXT_PHY_CTRL_19 */
+ 0x0040005B, /* EMIF1_EXT_PHY_CTRL_20 */
+ 0x0040005F, /* EMIF1_EXT_PHY_CTRL_21 */
+ 0x00800080, /* EMIF1_EXT_PHY_CTRL_22 */
+ 0x00800080, /* EMIF1_EXT_PHY_CTRL_23 */
+ 0x40010080, /* EMIF1_EXT_PHY_CTRL_24 */
+ 0x08102040, /* EMIF1_EXT_PHY_CTRL_25 */
+ 0x0000009F, /* EMIF1_EXT_PHY_CTRL_26 */
+ 0x0000009B, /* EMIF1_EXT_PHY_CTRL_27 */
+ 0x000000A4, /* EMIF1_EXT_PHY_CTRL_28 */
+ 0x000000A1, /* EMIF1_EXT_PHY_CTRL_29 */
+ 0x000000AD, /* EMIF1_EXT_PHY_CTRL_30 */
+ 0x0000003E, /* EMIF1_EXT_PHY_CTRL_31 */
+ 0x00000041, /* EMIF1_EXT_PHY_CTRL_32 */
+ 0x00000048, /* EMIF1_EXT_PHY_CTRL_33 */
+ 0x0000004B, /* EMIF1_EXT_PHY_CTRL_34 */
+ 0x0000004F, /* EMIF1_EXT_PHY_CTRL_35 */
+ 0x00000077 /* EMIF1_EXT_PHY_CTRL_36 */
+};
+
+static const u32 AM574x_DDR3L_666MHz_TI_AM574x_IDK_emif1_ext_phy_regs[] = {
+ 0x04040100, /* EMIF1_EXT_PHY_CTRL_1 */
+ 0x006B00C0, /* EMIF1_EXT_PHY_CTRL_2 */
+ 0x006B00BC, /* EMIF1_EXT_PHY_CTRL_3 */
+ 0x006B00C7, /* EMIF1_EXT_PHY_CTRL_4 */
+ 0x006B00C3, /* EMIF1_EXT_PHY_CTRL_5 */
+ 0x006B00D1, /* EMIF1_EXT_PHY_CTRL_6 */
+ 0x002F002F, /* EMIF1_EXT_PHY_CTRL_7 */
+ 0x002F002F, /* EMIF1_EXT_PHY_CTRL_8 */
+ 0x002F002F, /* EMIF1_EXT_PHY_CTRL_9 */
+ 0x002F002F, /* EMIF1_EXT_PHY_CTRL_10 */
+ 0x002F002F, /* EMIF1_EXT_PHY_CTRL_11 */
+ 0x00600071, /* EMIF1_EXT_PHY_CTRL_12 */
+ 0x00600075, /* EMIF1_EXT_PHY_CTRL_13 */
+ 0x0060007E, /* EMIF1_EXT_PHY_CTRL_14 */
+ 0x00600082, /* EMIF1_EXT_PHY_CTRL_15 */
+ 0x00600086, /* EMIF1_EXT_PHY_CTRL_16 */
+ 0x00400051, /* EMIF1_EXT_PHY_CTRL_17 */
+ 0x00400055, /* EMIF1_EXT_PHY_CTRL_18 */
+ 0x0040005E, /* EMIF1_EXT_PHY_CTRL_19 */
+ 0x00400062, /* EMIF1_EXT_PHY_CTRL_20 */
+ 0x00400066, /* EMIF1_EXT_PHY_CTRL_21 */
+ 0x00800080, /* EMIF1_EXT_PHY_CTRL_22 */
+ 0x00800080, /* EMIF1_EXT_PHY_CTRL_23 */
+ 0x40010080, /* EMIF1_EXT_PHY_CTRL_24 */
+ 0x08102040, /* EMIF1_EXT_PHY_CTRL_25 */
+ 0x000000B0, /* EMIF1_EXT_PHY_CTRL_26 */
+ 0x000000AC, /* EMIF1_EXT_PHY_CTRL_27 */
+ 0x000000B7, /* EMIF1_EXT_PHY_CTRL_28 */
+ 0x000000B3, /* EMIF1_EXT_PHY_CTRL_29 */
+ 0x000000C1, /* EMIF1_EXT_PHY_CTRL_30 */
+ 0x00000041, /* EMIF1_EXT_PHY_CTRL_31 */
+ 0x00000045, /* EMIF1_EXT_PHY_CTRL_32 */
+ 0x0000004E, /* EMIF1_EXT_PHY_CTRL_33 */
+ 0x00000052, /* EMIF1_EXT_PHY_CTRL_34 */
+ 0x00000056, /* EMIF1_EXT_PHY_CTRL_35 */
+ 0x00000077 /* EMIF1_EXT_PHY_CTRL_36 */
+};
+
static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = {
.sdram_config_init = 0x61851b32,
.sdram_config = 0x61851b32,
@@ -257,6 +413,123 @@ static const u32 beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs[] = {
0x0
};
+static const u32 AM572x_DDR3L_532MHz_TI_AM572x_EVM_emif2_ext_phy_regs[] = {
+ 0x04040100, /* EMIF2_EXT_PHY_CTRL_1 */
+ 0x006B0084, /* EMIF2_EXT_PHY_CTRL_2 */
+ 0x006B0087, /* EMIF2_EXT_PHY_CTRL_3 */
+ 0x006B007F, /* EMIF2_EXT_PHY_CTRL_4 */
+ 0x006B0080, /* EMIF2_EXT_PHY_CTRL_5 */
+ 0x006B006B, /* EMIF2_EXT_PHY_CTRL_6 */
+ 0x00320032, /* EMIF2_EXT_PHY_CTRL_7 */
+ 0x00320032, /* EMIF2_EXT_PHY_CTRL_8 */
+ 0x00320032, /* EMIF2_EXT_PHY_CTRL_9 */
+ 0x00320032, /* EMIF2_EXT_PHY_CTRL_10 */
+ 0x00320032, /* EMIF2_EXT_PHY_CTRL_11 */
+ 0x0060006A, /* EMIF2_EXT_PHY_CTRL_12 */
+ 0x00600067, /* EMIF2_EXT_PHY_CTRL_13 */
+ 0x00600065, /* EMIF2_EXT_PHY_CTRL_14 */
+ 0x00600064, /* EMIF2_EXT_PHY_CTRL_15 */
+ 0x00600060, /* EMIF2_EXT_PHY_CTRL_16 */
+ 0x0040004A, /* EMIF2_EXT_PHY_CTRL_17 */
+ 0x00400047, /* EMIF2_EXT_PHY_CTRL_18 */
+ 0x00400045, /* EMIF2_EXT_PHY_CTRL_19 */
+ 0x00400044, /* EMIF2_EXT_PHY_CTRL_20 */
+ 0x00400040, /* EMIF2_EXT_PHY_CTRL_21 */
+ 0x00800080, /* EMIF2_EXT_PHY_CTRL_22 */
+ 0x00800080, /* EMIF2_EXT_PHY_CTRL_23 */
+ 0x40010080, /* EMIF2_EXT_PHY_CTRL_24 */
+ 0x08102040, /* EMIF2_EXT_PHY_CTRL_25 */
+ 0x00000074, /* EMIF2_EXT_PHY_CTRL_26 */
+ 0x00000077, /* EMIF2_EXT_PHY_CTRL_27 */
+ 0x0000006F, /* EMIF2_EXT_PHY_CTRL_28 */
+ 0x00000070, /* EMIF2_EXT_PHY_CTRL_29 */
+ 0x00000000, /* EMIF2_EXT_PHY_CTRL_30 */
+ 0x0000003A, /* EMIF2_EXT_PHY_CTRL_31 */
+ 0x00000037, /* EMIF2_EXT_PHY_CTRL_32 */
+ 0x00000035, /* EMIF2_EXT_PHY_CTRL_33 */
+ 0x00000034, /* EMIF2_EXT_PHY_CTRL_34 */
+ 0x00000000, /* EMIF2_EXT_PHY_CTRL_35 */
+ 0x00000077 /* EMIF2_EXT_PHY_CTRL_36 */
+};
+
+static const u32 AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif2_ext_phy_regs[] = {
+ 0x04040100, /* EMIF2_EXT_PHY_CTRL_1 */
+ 0x006B00AB, /* EMIF2_EXT_PHY_CTRL_2 */
+ 0x006B00AB, /* EMIF2_EXT_PHY_CTRL_3 */
+ 0x006B00B4, /* EMIF2_EXT_PHY_CTRL_4 */
+ 0x006B00B2, /* EMIF2_EXT_PHY_CTRL_5 */
+ 0x006B006B, /* EMIF2_EXT_PHY_CTRL_6 */
+ 0x00320032, /* EMIF2_EXT_PHY_CTRL_7 */
+ 0x00320032, /* EMIF2_EXT_PHY_CTRL_8 */
+ 0x00320032, /* EMIF2_EXT_PHY_CTRL_9 */
+ 0x00320032, /* EMIF2_EXT_PHY_CTRL_10 */
+ 0x00320032, /* EMIF2_EXT_PHY_CTRL_11 */
+ 0x00600073, /* EMIF2_EXT_PHY_CTRL_12 */
+ 0x00600074, /* EMIF2_EXT_PHY_CTRL_13 */
+ 0x00600078, /* EMIF2_EXT_PHY_CTRL_14 */
+ 0x0060007A, /* EMIF2_EXT_PHY_CTRL_15 */
+ 0x00600060, /* EMIF2_EXT_PHY_CTRL_16 */
+ 0x00400053, /* EMIF2_EXT_PHY_CTRL_17 */
+ 0x00400054, /* EMIF2_EXT_PHY_CTRL_18 */
+ 0x00400058, /* EMIF2_EXT_PHY_CTRL_19 */
+ 0x0040005A, /* EMIF2_EXT_PHY_CTRL_20 */
+ 0x00400040, /* EMIF2_EXT_PHY_CTRL_21 */
+ 0x00800080, /* EMIF2_EXT_PHY_CTRL_22 */
+ 0x00800080, /* EMIF2_EXT_PHY_CTRL_23 */
+ 0x40010080, /* EMIF2_EXT_PHY_CTRL_24 */
+ 0x08102040, /* EMIF2_EXT_PHY_CTRL_25 */
+ 0x0000009B, /* EMIF2_EXT_PHY_CTRL_26 */
+ 0x0000009B, /* EMIF2_EXT_PHY_CTRL_27 */
+ 0x000000A4, /* EMIF2_EXT_PHY_CTRL_28 */
+ 0x000000A2, /* EMIF2_EXT_PHY_CTRL_29 */
+ 0x00000000, /* EMIF2_EXT_PHY_CTRL_30 */
+ 0x00000043, /* EMIF2_EXT_PHY_CTRL_31 */
+ 0x00000044, /* EMIF2_EXT_PHY_CTRL_32 */
+ 0x00000048, /* EMIF2_EXT_PHY_CTRL_33 */
+ 0x0000004A, /* EMIF2_EXT_PHY_CTRL_34 */
+ 0x00000000, /* EMIF2_EXT_PHY_CTRL_35 */
+ 0x00000077 /* EMIF2_EXT_PHY_CTRL_36 */
+};
+
+static const u32 AM574x_DDR3L_666MHz_TI_AM574x_IDK_emif2_ext_phy_regs[] = {
+ 0x04040100, /* EMIF2_EXT_PHY_CTRL_1 */
+ 0x006B00BC, /* EMIF2_EXT_PHY_CTRL_2 */
+ 0x006B00BB, /* EMIF2_EXT_PHY_CTRL_3 */
+ 0x006B00C7, /* EMIF2_EXT_PHY_CTRL_4 */
+ 0x006B00C4, /* EMIF2_EXT_PHY_CTRL_5 */
+ 0x006B006B, /* EMIF2_EXT_PHY_CTRL_6 */
+ 0x002F002F, /* EMIF2_EXT_PHY_CTRL_7 */
+ 0x002F002F, /* EMIF2_EXT_PHY_CTRL_8 */
+ 0x002F002F, /* EMIF2_EXT_PHY_CTRL_9 */
+ 0x002F002F, /* EMIF2_EXT_PHY_CTRL_10 */
+ 0x002F002F, /* EMIF2_EXT_PHY_CTRL_11 */
+ 0x00600078, /* EMIF2_EXT_PHY_CTRL_12 */
+ 0x00600079, /* EMIF2_EXT_PHY_CTRL_13 */
+ 0x0060007E, /* EMIF2_EXT_PHY_CTRL_14 */
+ 0x00600081, /* EMIF2_EXT_PHY_CTRL_15 */
+ 0x00600060, /* EMIF2_EXT_PHY_CTRL_16 */
+ 0x00400058, /* EMIF2_EXT_PHY_CTRL_17 */
+ 0x00400059, /* EMIF2_EXT_PHY_CTRL_18 */
+ 0x0040005E, /* EMIF2_EXT_PHY_CTRL_19 */
+ 0x00400061, /* EMIF2_EXT_PHY_CTRL_20 */
+ 0x00400040, /* EMIF2_EXT_PHY_CTRL_21 */
+ 0x00800080, /* EMIF2_EXT_PHY_CTRL_22 */
+ 0x00800080, /* EMIF2_EXT_PHY_CTRL_23 */
+ 0x40010080, /* EMIF2_EXT_PHY_CTRL_24 */
+ 0x08102040, /* EMIF2_EXT_PHY_CTRL_25 */
+ 0x000000AC, /* EMIF2_EXT_PHY_CTRL_26 */
+ 0x000000AB, /* EMIF2_EXT_PHY_CTRL_27 */
+ 0x000000B7, /* EMIF2_EXT_PHY_CTRL_28 */
+ 0x000000B4, /* EMIF2_EXT_PHY_CTRL_29 */
+ 0x00000000, /* EMIF2_EXT_PHY_CTRL_30 */
+ 0x00000048, /* EMIF2_EXT_PHY_CTRL_31 */
+ 0x00000049, /* EMIF2_EXT_PHY_CTRL_32 */
+ 0x0000004E, /* EMIF2_EXT_PHY_CTRL_33 */
+ 0x00000051, /* EMIF2_EXT_PHY_CTRL_34 */
+ 0x00000000, /* EMIF2_EXT_PHY_CTRL_35 */
+ 0x00000077 /* EMIF2_EXT_PHY_CTRL_36 */
+};
+
static const struct emif_regs am571x_emif1_ddr3_666mhz_emif_regs = {
.sdram_config_init = 0x61863332,
.sdram_config = 0x61863332,
@@ -334,12 +607,44 @@ void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, const u32 **regs, u32 *size)
{
switch (emif_nr) {
case 1:
- *regs = beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs;
- *size = ARRAY_SIZE(beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs);
+ if (board_is_am572x_evm()) {
+ *regs = AM572x_DDR3L_532MHz_TI_AM572x_EVM_emif1_ext_phy_regs;
+ *size = ARRAY_SIZE
+ (AM572x_DDR3L_532MHz_TI_AM572x_EVM_emif1_ext_phy_regs);
+ } else if (board_is_am574x_idk()) {
+ *regs = AM574x_DDR3L_666MHz_TI_AM574x_IDK_emif1_ext_phy_regs;
+ *size = ARRAY_SIZE
+ (AM574x_DDR3L_666MHz_TI_AM574x_IDK_emif1_ext_phy_regs);
+ } else if (board_is_am572x_idk()) {
+ *regs = AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif1_ext_phy_regs;
+ *size = ARRAY_SIZE
+ (AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif1_ext_phy_regs);
+ } else if (board_is_am571x_idk()) {
+ *regs = AM571x_DDR3L_666MHz_TI_AM571x_IDK_emif1_ext_phy_regs;
+ *size = ARRAY_SIZE
+ (AM571x_DDR3L_666MHz_TI_AM571x_IDK_emif1_ext_phy_regs);
+ } else {
+ *regs = beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs;
+ *size = ARRAY_SIZE(beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs);
+ }
break;
case 2:
- *regs = beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs;
- *size = ARRAY_SIZE(beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs);
+ if (board_is_am572x_evm()) {
+ *regs = AM572x_DDR3L_532MHz_TI_AM572x_EVM_emif2_ext_phy_regs;
+ *size = ARRAY_SIZE
+ (AM572x_DDR3L_532MHz_TI_AM572x_EVM_emif2_ext_phy_regs);
+ } else if (board_is_am574x_idk()) {
+ *regs = AM574x_DDR3L_666MHz_TI_AM574x_IDK_emif2_ext_phy_regs;
+ *size = ARRAY_SIZE
+ (AM574x_DDR3L_666MHz_TI_AM574x_IDK_emif2_ext_phy_regs);
+ } else if (board_is_am572x_idk()) {
+ *regs = AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif2_ext_phy_regs;
+ *size = ARRAY_SIZE
+ (AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif2_ext_phy_regs);
+ } else {
+ *regs = beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs;
+ *size = ARRAY_SIZE(beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs);
+ }
break;
}
}
diff --git a/board/ti/am62ax/evm.c b/board/ti/am62ax/evm.c
index 9065038756..71fbc9e9c2 100644
--- a/board/ti/am62ax/evm.c
+++ b/board/ti/am62ax/evm.c
@@ -15,12 +15,17 @@
#include <fdt_support.h>
#include <spl.h>
+#include "../common/rtc.c"
+
#define CTRLMMR_USB0_PHY_CTRL 0x43004008
#define CTRLMMR_USB1_PHY_CTRL 0x43004018
#define CORE_VOLTAGE 0x80000000
int board_init(void)
{
+ if (IS_ENABLED(CONFIG_BOARD_HAS_32K_RTC_CRYSTAL))
+ board_rtc_init();
+
return 0;
}
diff --git a/board/ti/am62ax/rm-cfg.yaml b/board/ti/am62ax/rm-cfg.yaml
index 0e11bd3e3c..b9f3668c07 100644
--- a/board/ti/am62ax/rm-cfg.yaml
+++ b/board/ti/am62ax/rm-cfg.yaml
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
-# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
#
-# Resource management configuration for AM62ax
+# Resource management configuration for AM62A
#
---
@@ -18,234 +18,234 @@ rm-cfg:
host_cfg_entries:
- #1
host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
- #2
- host_id: 30
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 20
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
- #3
- host_id: 36
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 30
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
- #4
- host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ host_id: 36
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
- #5
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #6
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #7
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #8
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #9
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #10
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #11
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #12
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #13
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #14
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #15
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #16
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #17
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #18
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #19
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #20
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #21
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #22
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #23
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #24
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #25
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #26
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #27
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #28
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #29
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #30
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #31
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #32
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
resasg:
subhdr:
magic: 0x7B25
- size : 8
- resasg_entries_size: 1032
- reserved : 0
+ size: 8
+ resasg_entries_size: 1064
+ reserved: 0
resasg_entries:
-
start_resource: 0
@@ -253,896 +253,792 @@ rm-cfg:
type: 64
host_id: 12
reserved: 0
-
-
start_resource: 16
num_resource: 4
type: 64
host_id: 35
reserved: 0
-
-
start_resource: 16
num_resource: 4
type: 64
host_id: 36
reserved: 0
-
-
start_resource: 20
num_resource: 22
type: 64
host_id: 30
reserved: 0
-
-
start_resource: 0
num_resource: 16
type: 192
host_id: 12
reserved: 0
-
-
start_resource: 34
num_resource: 2
type: 192
host_id: 30
reserved: 0
-
-
start_resource: 0
- num_resource: 4
+ num_resource: 2
type: 320
host_id: 12
reserved: 0
-
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 320
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 320
+ host_id: 36
+ reserved: 0
-
start_resource: 4
num_resource: 4
type: 320
host_id: 30
reserved: 0
-
-
start_resource: 0
num_resource: 26
type: 384
host_id: 128
reserved: 0
-
-
start_resource: 50176
num_resource: 164
type: 1666
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 1
type: 1667
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 18
type: 1677
host_id: 12
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1677
- host_id: 35
+ host_id: 20
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1677
host_id: 36
reserved: 0
-
-
start_resource: 24
num_resource: 2
type: 1677
host_id: 30
reserved: 0
-
-
start_resource: 26
num_resource: 6
type: 1677
host_id: 128
reserved: 0
-
-
start_resource: 54
num_resource: 18
type: 1678
host_id: 12
reserved: 0
-
-
start_resource: 72
num_resource: 6
type: 1678
- host_id: 35
+ host_id: 20
reserved: 0
-
-
start_resource: 72
num_resource: 6
type: 1678
host_id: 36
reserved: 0
-
-
start_resource: 78
num_resource: 2
type: 1678
host_id: 30
reserved: 0
-
-
start_resource: 80
num_resource: 2
type: 1678
host_id: 128
reserved: 0
-
-
start_resource: 32
num_resource: 12
type: 1679
host_id: 12
reserved: 0
-
-
start_resource: 44
num_resource: 6
type: 1679
- host_id: 35
+ host_id: 20
reserved: 0
-
-
start_resource: 44
num_resource: 6
type: 1679
host_id: 36
reserved: 0
-
-
start_resource: 50
num_resource: 2
type: 1679
host_id: 30
reserved: 0
-
-
start_resource: 52
num_resource: 2
type: 1679
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 18
type: 1696
host_id: 12
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1696
- host_id: 35
+ host_id: 20
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1696
host_id: 36
reserved: 0
-
-
start_resource: 24
num_resource: 2
type: 1696
host_id: 30
reserved: 0
-
-
start_resource: 26
num_resource: 6
type: 1696
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 18
type: 1697
host_id: 12
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1697
- host_id: 35
+ host_id: 20
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1697
host_id: 36
reserved: 0
-
-
start_resource: 24
num_resource: 2
type: 1697
host_id: 30
reserved: 0
-
-
start_resource: 26
num_resource: 2
type: 1697
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 12
type: 1698
host_id: 12
reserved: 0
-
-
start_resource: 12
num_resource: 6
type: 1698
- host_id: 35
+ host_id: 20
reserved: 0
-
-
start_resource: 12
num_resource: 6
type: 1698
host_id: 36
reserved: 0
-
-
start_resource: 18
num_resource: 2
type: 1698
host_id: 30
reserved: 0
-
-
start_resource: 20
num_resource: 2
type: 1698
host_id: 128
reserved: 0
-
-
start_resource: 6
- num_resource: 34
+ num_resource: 26
type: 1802
host_id: 12
reserved: 0
-
-
- start_resource: 44
- num_resource: 36
+ start_resource: 32
+ num_resource: 8
+ type: 1802
+ host_id: 20
+ reserved: 0
+ -
+ start_resource: 45
+ num_resource: 35
type: 1802
host_id: 35
reserved: 0
-
-
- start_resource: 44
- num_resource: 36
+ start_resource: 45
+ num_resource: 35
type: 1802
host_id: 36
reserved: 0
-
-
start_resource: 168
num_resource: 8
type: 1802
host_id: 30
reserved: 0
-
-
- start_resource: 14
+ start_resource: 15
num_resource: 512
type: 1805
host_id: 12
reserved: 0
-
-
- start_resource: 526
+ start_resource: 527
num_resource: 256
type: 1805
host_id: 35
reserved: 0
-
-
- start_resource: 526
+ start_resource: 527
num_resource: 256
type: 1805
host_id: 36
reserved: 0
-
-
- start_resource: 782
+ start_resource: 783
num_resource: 128
type: 1805
host_id: 30
reserved: 0
-
-
- start_resource: 910
- num_resource: 626
+ start_resource: 911
+ num_resource: 128
+ type: 1805
+ host_id: 20
+ reserved: 0
+ -
+ start_resource: 1039
+ num_resource: 497
type: 1805
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 1024
type: 1807
host_id: 128
reserved: 0
-
-
start_resource: 4096
num_resource: 29
type: 1808
host_id: 128
reserved: 0
-
-
start_resource: 4608
num_resource: 99
type: 1809
host_id: 128
reserved: 0
-
-
start_resource: 5120
num_resource: 24
type: 1810
host_id: 128
reserved: 0
-
-
start_resource: 5632
num_resource: 51
type: 1811
host_id: 128
reserved: 0
-
-
start_resource: 6144
num_resource: 51
type: 1812
host_id: 128
reserved: 0
-
-
start_resource: 6656
num_resource: 51
type: 1813
host_id: 128
reserved: 0
-
-
start_resource: 8192
num_resource: 32
type: 1814
host_id: 128
reserved: 0
-
-
start_resource: 8704
num_resource: 32
type: 1815
host_id: 128
reserved: 0
-
-
start_resource: 9216
num_resource: 32
type: 1816
host_id: 128
reserved: 0
-
-
start_resource: 9728
num_resource: 22
type: 1817
host_id: 128
reserved: 0
-
-
start_resource: 10240
num_resource: 22
type: 1818
host_id: 128
reserved: 0
-
-
start_resource: 10752
num_resource: 22
type: 1819
host_id: 128
reserved: 0
-
-
start_resource: 11264
num_resource: 28
type: 1820
host_id: 128
reserved: 0
-
-
start_resource: 11776
num_resource: 28
type: 1821
host_id: 128
reserved: 0
-
-
start_resource: 12288
num_resource: 28
type: 1822
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 1
type: 1923
host_id: 128
reserved: 0
-
-
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num_resource: 10
type: 1936
host_id: 12
reserved: 0
-
-
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num_resource: 3
type: 1936
host_id: 35
reserved: 0
-
-
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num_resource: 3
type: 1936
host_id: 36
reserved: 0
-
-
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num_resource: 3
type: 1936
host_id: 30
reserved: 0
-
-
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num_resource: 3
type: 1936
host_id: 128
reserved: 0
-
-
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num_resource: 64
type: 1937
host_id: 12
reserved: 0
-
-
start_resource: 19
num_resource: 64
type: 1937
host_id: 30
reserved: 0
-
-
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num_resource: 8
type: 1938
host_id: 12
reserved: 0
-
-
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num_resource: 8
type: 1939
host_id: 12
reserved: 0
-
-
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num_resource: 10
type: 1942
host_id: 12
reserved: 0
-
-
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num_resource: 3
type: 1942
host_id: 35
reserved: 0
-
-
start_resource: 109
num_resource: 3
type: 1942
host_id: 36
reserved: 0
-
-
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num_resource: 3
type: 1942
host_id: 30
reserved: 0
-
-
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num_resource: 3
type: 1942
host_id: 128
reserved: 0
-
-
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num_resource: 16
type: 1943
host_id: 12
reserved: 0
-
-
start_resource: 118
num_resource: 16
type: 1943
host_id: 30
reserved: 0
-
-
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num_resource: 8
type: 1944
host_id: 12
reserved: 0
-
-
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num_resource: 8
type: 1945
host_id: 12
reserved: 0
-
-
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num_resource: 8
type: 1946
host_id: 12
reserved: 0
-
-
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num_resource: 8
type: 1947
host_id: 12
reserved: 0
-
-
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type: 1955
host_id: 12
reserved: 0
-
-
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type: 1955
host_id: 35
reserved: 0
-
-
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num_resource: 3
type: 1955
host_id: 36
reserved: 0
-
-
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type: 1955
host_id: 30
reserved: 0
-
-
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num_resource: 3
type: 1955
host_id: 128
reserved: 0
-
-
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num_resource: 8
type: 1956
host_id: 12
reserved: 0
-
-
start_resource: 19
num_resource: 8
type: 1956
host_id: 30
reserved: 0
-
-
start_resource: 27
num_resource: 1
type: 1957
host_id: 12
reserved: 0
-
-
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num_resource: 1
type: 1958
host_id: 12
reserved: 0
-
-
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num_resource: 10
type: 1961
host_id: 12
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1961
host_id: 35
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1961
host_id: 36
reserved: 0
-
-
start_resource: 13
num_resource: 3
type: 1961
host_id: 30
reserved: 0
-
-
start_resource: 16
num_resource: 3
type: 1961
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 10
type: 1962
host_id: 12
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1962
host_id: 35
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1962
host_id: 36
reserved: 0
-
-
start_resource: 13
num_resource: 3
type: 1962
host_id: 30
reserved: 0
-
-
start_resource: 16
num_resource: 3
type: 1962
host_id: 128
reserved: 0
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host_id: 128
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host_id: 12
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host_id: 128
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diff --git a/board/ti/am62px/Kconfig b/board/ti/am62px/Kconfig
new file mode 100644
index 0000000000..3ef1ff113a
--- /dev/null
+++ b/board/ti/am62px/Kconfig
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+
+choice
+ prompt "TI K3 AM62Px based boards"
+ optional
+
+config TARGET_AM62P5_A53_EVM
+ bool "TI K3 based AM62P5 EVM running on A53"
+ select ARM64
+ select BINMAN
+ imply BOARD
+ imply SPL_BOARD
+ imply TI_I2C_BOARD_DETECT
+
+config TARGET_AM62P5_R5_EVM
+ bool "TI K3 based AM62P5 EVM running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select RAM
+ select SPL_RAM
+ select K3_DDRSS
+ select BINMAN
+ imply SYS_K3_SPL_ATF
+ imply TI_I2C_BOARD_DETECT
+
+endchoice
+
+if TARGET_AM62P5_R5_EVM || TARGET_AM62P5_A53_EVM
+
+config SYS_BOARD
+ default "am62px"
+
+config SYS_VENDOR
+ default "ti"
+
+config SYS_CONFIG_NAME
+ default "am62px_evm"
+
+source "board/ti/common/Kconfig"
+
+endif
+
+if TARGET_AM62P5_R5_EVM
+
+config SPL_LDSCRIPT
+ default "arch/arm/mach-omap2/u-boot-spl.lds"
+
+endif
diff --git a/board/ti/am62px/MAINTAINERS b/board/ti/am62px/MAINTAINERS
new file mode 100644
index 0000000000..57c86ddbc4
--- /dev/null
+++ b/board/ti/am62px/MAINTAINERS
@@ -0,0 +1,9 @@
+AM62Px BOARD
+M: Vignesh Raghavendra <vigneshr@ti.com>
+M: Bryan Brattlof <bb@ti.com>
+M: Tom Rini <trini@konsulko.com>
+S: Maintained
+F: board/ti/am62px/
+F: include/configs/am62p5_evm.h
+F: configs/am62px_evm_r5_defconfig
+F: configs/am62px_evm_a53_defconfig
diff --git a/board/ti/am62px/Makefile b/board/ti/am62px/Makefile
new file mode 100644
index 0000000000..921afdff27
--- /dev/null
+++ b/board/ti/am62px/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += evm.o
diff --git a/board/ti/am62px/am62px.env b/board/ti/am62px/am62px.env
new file mode 100644
index 0000000000..9ed3ef5f71
--- /dev/null
+++ b/board/ti/am62px/am62px.env
@@ -0,0 +1,27 @@
+#include <environment/ti/ti_armv7_common.env>
+#include <environment/ti/mmc.env>
+#include <environment/ti/k3_dfu.env>
+#include <environment/ti/ospi_nand.env>
+#if CONFIG_CMD_REMOTEPROC
+#include <environment/ti/k3_rproc.env>
+#endif
+
+default_device_tree=ti/k3-am62p5-sk.dtb
+findfdt=
+ setenv name_fdt ${default_device_tree};
+ setenv fdtfile ${name_fdt}
+name_kern=Image
+console=ttyS2,115200n8
+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000
+ ${mtdparts}
+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+
+boot=mmc
+mmcdev=1
+bootpart=1:2
+bootdir=/boot
+rd_spec=-
+
+#if CONFIG_CMD_ABOOTIMG
+#include <environment/ti/mmc_android.env>
+#endif
diff --git a/board/ti/am62px/board-cfg.yaml b/board/ti/am62px/board-cfg.yaml
new file mode 100644
index 0000000000..2a741d8d4f
--- /dev/null
+++ b/board/ti/am62px/board-cfg.yaml
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM62Px SoCs
+#
+
+---
+board-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor: 0x1
+ scaling_profile: 0x1
+ disable_main_nav_secure_proxy: 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size: 0x10
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
diff --git a/board/ti/am62px/evm.c b/board/ti/am62px/evm.c
new file mode 100644
index 0000000000..60b5606dea
--- /dev/null
+++ b/board/ti/am62px/evm.c
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Board specific initialization for AM62Px platforms
+ *
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ */
+
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <common.h>
+#include <dm/uclass.h>
+#include <env.h>
+#include <fdt_support.h>
+#include <spl.h>
+
+#include "../common/rtc.c"
+
+int board_init(void)
+{
+ if (IS_ENABLED(CONFIG_BOARD_HAS_32K_RTC_CRYSTAL))
+ board_rtc_init();
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+ return fdtdec_setup_memory_banksize();
+}
diff --git a/board/ti/am62px/pm-cfg.yaml b/board/ti/am62px/pm-cfg.yaml
new file mode 100644
index 0000000000..3ff27ce702
--- /dev/null
+++ b/board/ti/am62px/pm-cfg.yaml
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for AM62Px
+#
+#
+---
+pm-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
diff --git a/board/ti/am62px/rm-cfg.yaml b/board/ti/am62px/rm-cfg.yaml
new file mode 100644
index 0000000000..fe76feee0f
--- /dev/null
+++ b/board/ti/am62px/rm-cfg.yaml
@@ -0,0 +1,987 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Resource management configuration for AM62P
+#
+
+---
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size : 356
+ host_cfg_entries:
+ - #1
+ host_id: 12
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #2
+ host_id: 30
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #3
+ host_id: 36
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #4
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #5
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #6
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #7
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #8
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #9
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #10
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #11
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #12
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #13
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #14
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #15
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #16
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #17
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #18
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #19
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #20
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #21
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #22
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #23
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #24
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #25
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #26
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #27
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #28
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #29
+ host_id: 0
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+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #30
+ host_id: 0
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+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #31
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #32
+ host_id: 0
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+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ resasg:
+ subhdr:
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+ size: 8
+ resasg_entries_size: 984
+ reserved: 0
+ resasg_entries:
+ -
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+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 64
+ type: 1937
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 83
+ num_resource: 8
+ type: 1938
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 91
+ num_resource: 8
+ type: 1939
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 99
+ num_resource: 10
+ type: 1942
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 109
+ num_resource: 3
+ type: 1942
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 109
+ num_resource: 3
+ type: 1942
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 112
+ num_resource: 3
+ type: 1942
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 115
+ num_resource: 3
+ type: 1942
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 118
+ num_resource: 16
+ type: 1943
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 118
+ num_resource: 16
+ type: 1943
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 134
+ num_resource: 8
+ type: 1944
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 134
+ num_resource: 8
+ type: 1945
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 142
+ num_resource: 8
+ type: 1946
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 142
+ num_resource: 8
+ type: 1947
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 1955
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1955
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1955
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 1955
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 1955
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 8
+ type: 1956
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 8
+ type: 1956
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 27
+ num_resource: 1
+ type: 1957
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 28
+ num_resource: 1
+ type: 1958
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 1961
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1961
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1961
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 1961
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 1961
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 1962
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1962
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1962
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 1962
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 1962
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 1963
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 1963
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 16
+ type: 1964
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 16
+ type: 1964
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 20
+ num_resource: 1
+ type: 1965
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 35
+ num_resource: 8
+ type: 1966
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 21
+ num_resource: 1
+ type: 1967
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 35
+ num_resource: 8
+ type: 1968
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 22
+ num_resource: 1
+ type: 1969
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 43
+ num_resource: 8
+ type: 1970
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 23
+ num_resource: 1
+ type: 1971
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 43
+ num_resource: 8
+ type: 1972
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 2112
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 2122
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 51200
+ num_resource: 12
+ type: 12738
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 12739
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 6
+ type: 12750
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 6
+ type: 12769
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 12810
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 12288
+ num_resource: 128
+ type: 12813
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 3072
+ num_resource: 6
+ type: 12826
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 3584
+ num_resource: 6
+ type: 12827
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 4096
+ num_resource: 6
+ type: 12828
+ host_id: 128
+ reserved: 0
diff --git a/board/ti/am62px/sec-cfg.yaml b/board/ti/am62px/sec-cfg.yaml
new file mode 100644
index 0000000000..9a6e52136d
--- /dev/null
+++ b/board/ti/am62px/sec-cfg.yaml
@@ -0,0 +1,378 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Security configuration for AM62Px
+#
+---
+sec-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id: 0
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci: 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size: 0
+ auth_resource_owner: 0
+ enable_saul_psil_global_config_writes: 0x5A
+ rsvd: [0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
+ allowed_debug_level_rsvd: 0
+ rsvd: 0
+ min_cert_rev: 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender: 0
+ handover_to_host_id: 0
+ rsvd: [0, 0, 0, 0]
diff --git a/board/ti/am62px/tifs-rm-cfg.yaml b/board/ti/am62px/tifs-rm-cfg.yaml
new file mode 100644
index 0000000000..a80a275046
--- /dev/null
+++ b/board/ti/am62px/tifs-rm-cfg.yaml
@@ -0,0 +1,879 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Resource management configuration for AM62P
+#
+
+---
+
+tifs-rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size : 356
+ host_cfg_entries:
+ - #1
+ host_id: 12
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #2
+ host_id: 30
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #3
+ host_id: 36
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #4
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #5
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #6
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #7
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #8
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #9
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #10
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #11
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #12
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #13
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #14
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #15
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #16
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #17
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #18
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #19
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #20
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #21
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #22
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #23
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #24
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #25
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #26
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #27
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #28
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #29
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #30
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #31
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #32
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size: 8
+ resasg_entries_size: 840
+ reserved: 0
+ resasg_entries:
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 1677
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 1677
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 1677
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 1677
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 26
+ num_resource: 6
+ type: 1677
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 57
+ num_resource: 18
+ type: 1678
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 75
+ num_resource: 5
+ type: 1678
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 75
+ num_resource: 5
+ type: 1678
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 80
+ num_resource: 2
+ type: 1678
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 32
+ num_resource: 12
+ type: 1679
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 44
+ num_resource: 6
+ type: 1679
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 44
+ num_resource: 6
+ type: 1679
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 50
+ num_resource: 2
+ type: 1679
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 52
+ num_resource: 5
+ type: 1679
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 1696
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 1696
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 1696
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 1696
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 26
+ num_resource: 6
+ type: 1696
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 1697
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 18
+ num_resource: 5
+ type: 1697
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 18
+ num_resource: 5
+ type: 1697
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 23
+ num_resource: 2
+ type: 1697
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 12
+ type: 1698
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 1698
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 1698
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 18
+ num_resource: 2
+ type: 1698
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 20
+ num_resource: 5
+ type: 1698
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 5
+ num_resource: 35
+ type: 1802
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 44
+ num_resource: 36
+ type: 1802
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 44
+ num_resource: 36
+ type: 1802
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 168
+ num_resource: 8
+ type: 1802
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 4096
+ num_resource: 29
+ type: 1807
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 4608
+ num_resource: 99
+ type: 1808
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 5120
+ num_resource: 24
+ type: 1809
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 5632
+ num_resource: 51
+ type: 1810
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 6144
+ num_resource: 51
+ type: 1811
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 8192
+ num_resource: 32
+ type: 1812
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 8704
+ num_resource: 32
+ type: 1813
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 9216
+ num_resource: 32
+ type: 1814
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 9728
+ num_resource: 25
+ type: 1815
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 10240
+ num_resource: 25
+ type: 1816
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 10752
+ num_resource: 25
+ type: 1817
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 11264
+ num_resource: 25
+ type: 1818
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 11776
+ num_resource: 25
+ type: 1819
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 12288
+ num_resource: 25
+ type: 1820
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 1936
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1936
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1936
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 1936
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 1936
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 64
+ type: 1937
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 64
+ type: 1937
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 83
+ num_resource: 8
+ type: 1938
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 91
+ num_resource: 8
+ type: 1939
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 99
+ num_resource: 10
+ type: 1942
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 109
+ num_resource: 3
+ type: 1942
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 109
+ num_resource: 3
+ type: 1942
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 112
+ num_resource: 3
+ type: 1942
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 115
+ num_resource: 3
+ type: 1942
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 118
+ num_resource: 16
+ type: 1943
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 118
+ num_resource: 16
+ type: 1943
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 134
+ num_resource: 8
+ type: 1944
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 134
+ num_resource: 8
+ type: 1945
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 142
+ num_resource: 8
+ type: 1946
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 142
+ num_resource: 8
+ type: 1947
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 1955
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1955
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1955
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 1955
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 1955
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 8
+ type: 1956
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 8
+ type: 1956
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 27
+ num_resource: 1
+ type: 1957
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 28
+ num_resource: 1
+ type: 1958
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 1961
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1961
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1961
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 1961
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 1961
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 1962
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1962
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1962
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 1962
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 1962
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 1963
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 1963
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 16
+ type: 1964
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 16
+ type: 1964
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 20
+ num_resource: 1
+ type: 1965
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 35
+ num_resource: 8
+ type: 1966
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 21
+ num_resource: 1
+ type: 1967
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 35
+ num_resource: 8
+ type: 1968
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 22
+ num_resource: 1
+ type: 1969
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 43
+ num_resource: 8
+ type: 1970
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 23
+ num_resource: 1
+ type: 1971
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 43
+ num_resource: 8
+ type: 1972
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 2112
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 2122
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 6
+ type: 12750
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 6
+ type: 12769
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 12810
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 3072
+ num_resource: 6
+ type: 12826
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 3584
+ num_resource: 6
+ type: 12827
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 4096
+ num_resource: 6
+ type: 12828
+ host_id: 128
+ reserved: 0
diff --git a/board/ti/am62x/am625_beagleplay_android.env b/board/ti/am62x/am625_beagleplay_android.env
new file mode 100644
index 0000000000..ae3f95187b
--- /dev/null
+++ b/board/ti/am62x/am625_beagleplay_android.env
@@ -0,0 +1,25 @@
+#include <board/ti/am62x/am62x.env>
+
+/* Android partitions
+ * note that += is needed because \n is converted by space in .env files */
+partitions=
+ name=bootloader,start=5M,size=8M,uuid=${uuid_gpt_bootloader};
+partitions+=name=misc,start=13824K,size=512K,uuid=${uuid_gpt_misc};
+partitions+=name=boot_a,size=40M,uuid=${uuid_gpt_boot_a};
+partitions+=name=boot_b,size=40M,uuid=${uuid_gpt_boot_b};
+partitions+=name=vendor_boot_a,size=32M,uuid=${uuid_gpt_vendor_boot_a};
+partitions+=name=vendor_boot_b,size=32M,uuid=${uuid_gpt_vendor_boot_b};
+partitions+=name=init_boot_a,size=8M,uuid=${uuid_gpt_init_boot_a};
+partitions+=name=init_boot_b,size=8M,uuid=${uuid_gpt_init_boot_b};
+partitions+=name=dtbo_a,size=8M,uuid=${uuid_gpt_dtbo_a};
+partitions+=name=dtbo_b,size=8M,uuid=${uuid_gpt_dtbo_b};
+partitions+=name=vbmeta_a,size=64K,uuid=${uuid_gpt_vbmeta_a};
+partitions+=name=vbmeta_b,size=64K,uuid=${uuid_gpt_vbmeta_b};
+partitions+=name=super,size=4608M,uuid=${uuid_gpt_super};
+partitions+=name=metadata,size=16M,uuid=${uuid_gpt_metadata};
+partitions+=name=persist,size=32M,uuid=${uuid_gpt_persist};
+partitions+=name=userdata,size=-,uuid=${uuid_gpt_userdata}
+
+/* fastboot variables */
+fastboot_raw_partition_tiboot3="0x0 0x800 mmcpart 1"
+fastboot_raw_partition_bootenv="0x800 0x400 mmcpart 1"
diff --git a/board/ti/am62x/am62x.env b/board/ti/am62x/am62x.env
index f02327d2e8..e507ca276c 100644
--- a/board/ti/am62x/am62x.env
+++ b/board/ti/am62x/am62x.env
@@ -12,6 +12,10 @@ findfdt=
setenv name_fdt ${default_device_tree};
if test $board_name = am62x_skevm; then
setenv name_fdt ti/k3-am625-sk.dtb; fi;
+ if test $board_name = am62b_p1_skevm; then
+ setenv name_fdt ti/k3-am625-sk.dtb; fi;
+ if test $board_name = am62x_sip_skevm; then
+ setenv name_fdt ti/k3-am625-sk.dtb; fi;
if test $board_name = am62x_lp_skevm; then
setenv name_fdt ti/k3-am62-lp-sk.dtb; fi;
if test $board_name = am62x_beagleplay; then
diff --git a/board/ti/am62x/evm.c b/board/ti/am62x/evm.c
index bee00a7a9e..d84c85b122 100644
--- a/board/ti/am62x/evm.c
+++ b/board/ti/am62x/evm.c
@@ -23,8 +23,12 @@
#include <asm/gpio.h>
#include <cpu_func.h>
+#include <linux/sizes.h>
+
#include "../common/board_detect.h"
+#include "../common/rtc.c"
+
DECLARE_GLOBAL_DATA_PTR;
#define AM62X_MAX_DAUGHTER_CARDS 8
@@ -44,7 +48,9 @@ static struct gpio_desc board_det_gpios[AM62X_LPSK_BRD_DET_COUNT];
#define board_is_am62x_skevm() (board_ti_k3_is("AM62-SKEVM") || \
board_ti_k3_is("AM62B-SKEVM"))
+#define board_is_am62b_p1_skevm() board_ti_k3_is("AM62B-SKEVM-P1")
#define board_is_am62x_lp_skevm() board_ti_k3_is("AM62-LP-SKEVM")
+#define board_is_am62x_sip_skevm() board_ti_k3_is("AM62SIP-SKEVM")
#define board_is_am62x_play() board_ti_k3_is("BEAGLEPLAY-A0-")
#if CONFIG_IS_ENABLED(SPLASH_SCREEN)
@@ -72,6 +78,9 @@ int splash_screen_prepare(void)
int board_init(void)
{
+ if (IS_ENABLED(CONFIG_BOARD_HAS_32K_RTC_CRYSTAL))
+ board_rtc_init();
+
return 0;
}
@@ -85,6 +94,16 @@ int dram_init_banksize(void)
return fdtdec_setup_memory_banksize();
}
+phys_size_t get_effective_memsize(void)
+{
+ /*
+ * Just below 512MB are TF-A and OPTEE reserve regions, thus
+ * SPL/U-Boot RAM has to start below that. Leave 64MB space for
+ * all reserved memories.
+ */
+ return gd->ram_size == SZ_512M ? SZ_512M - SZ_64M : gd->ram_size;
+}
+
#if defined(CONFIG_SPL_BUILD)
static int video_setup(void)
{
@@ -108,13 +127,6 @@ static int video_setup(void)
#define CTRLMMR_USB1_PHY_CTRL 0x43004018
#define CORE_VOLTAGE 0x80000000
-#define WKUP_CTRLMMR_DBOUNCE_CFG1 0x04504084
-#define WKUP_CTRLMMR_DBOUNCE_CFG2 0x04504088
-#define WKUP_CTRLMMR_DBOUNCE_CFG3 0x0450408c
-#define WKUP_CTRLMMR_DBOUNCE_CFG4 0x04504090
-#define WKUP_CTRLMMR_DBOUNCE_CFG5 0x04504094
-#define WKUP_CTRLMMR_DBOUNCE_CFG6 0x04504098
-
void spl_board_init(void)
{
u32 val;
@@ -129,29 +141,6 @@ void spl_board_init(void)
val &= ~(CORE_VOLTAGE);
writel(val, CTRLMMR_USB1_PHY_CTRL);
- /* We have 32k crystal, so lets enable it */
- val = readl(MCU_CTRL_LFXOSC_CTRL);
- val &= ~(MCU_CTRL_LFXOSC_32K_DISABLE_VAL);
- writel(val, MCU_CTRL_LFXOSC_CTRL);
- /* Add any TRIM needed for the crystal here.. */
- /* Make sure to mux up to take the SoC 32k from the crystal */
- writel(MCU_CTRL_DEVICE_CLKOUT_LFOSC_SELECT_VAL,
- MCU_CTRL_DEVICE_CLKOUT_32K_CTRL);
-
- /* Setup debounce conf registers - arbitrary values. Times are approx */
- /* 1.9ms debounce @ 32k */
- writel(WKUP_CTRLMMR_DBOUNCE_CFG1, 0x1);
- /* 5ms debounce @ 32k */
- writel(WKUP_CTRLMMR_DBOUNCE_CFG2, 0x5);
- /* 20ms debounce @ 32k */
- writel(WKUP_CTRLMMR_DBOUNCE_CFG3, 0x14);
- /* 46ms debounce @ 32k */
- writel(WKUP_CTRLMMR_DBOUNCE_CFG4, 0x18);
- /* 100ms debounce @ 32k */
- writel(WKUP_CTRLMMR_DBOUNCE_CFG5, 0x1c);
- /* 156ms debounce @ 32k */
- writel(WKUP_CTRLMMR_DBOUNCE_CFG6, 0x1f);
-
video_setup();
enable_caches();
if (IS_ENABLED(CONFIG_SPL_SPLASH_SCREEN) && IS_ENABLED(CONFIG_SPL_BMP))
@@ -253,8 +242,12 @@ static void setup_board_eeprom_env(void)
if (board_is_am62x_skevm())
name = "am62x_skevm";
+ else if (board_is_am62b_p1_skevm())
+ name = "am62b_p1_skevm";
else if (board_is_am62x_lp_skevm())
name = "am62x_lp_skevm";
+ else if (board_is_am62x_sip_skevm())
+ name = "am62x_sip_skevm";
else if (board_is_am62x_play())
name = "am62x_beagleplay";
else
diff --git a/board/ti/am62x/rm-cfg.yaml b/board/ti/am62x/rm-cfg.yaml
index 1e8678c30b..c06232f6dd 100644
--- a/board/ti/am62x/rm-cfg.yaml
+++ b/board/ti/am62x/rm-cfg.yaml
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
-# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
#
-# Resource management configuration for AM62
+# Resource management configuration for AM62X
#
---
@@ -18,234 +18,234 @@ rm-cfg:
host_cfg_entries:
- #1
host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
- #2
host_id: 30
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
- #3
host_id: 36
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
- #4
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #5
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #6
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #7
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #8
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #9
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #10
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #11
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #12
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #13
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #14
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #15
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #16
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #17
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #18
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #19
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #20
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #21
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #22
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #23
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #24
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #25
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #26
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #27
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #28
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #29
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #30
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #31
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #32
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
resasg:
subhdr:
magic: 0x7B25
- size : 8
- resasg_entries_size: 960
- reserved : 0
+ size: 8
+ resasg_entries_size: 976
+ reserved: 0
resasg_entries:
-
start_resource: 0
@@ -253,833 +253,726 @@ rm-cfg:
type: 64
host_id: 12
reserved: 0
-
-
start_resource: 16
num_resource: 4
type: 64
host_id: 35
reserved: 0
-
-
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-
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host_id: 12
reserved: 0
-
-
start_resource: 34
num_resource: 2
type: 192
host_id: 30
reserved: 0
-
-
start_resource: 0
- num_resource: 4
+ num_resource: 2
type: 320
host_id: 12
reserved: 0
-
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 320
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 320
+ host_id: 36
+ reserved: 0
-
start_resource: 4
num_resource: 4
type: 320
host_id: 30
reserved: 0
-
-
start_resource: 0
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type: 384
host_id: 128
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-
-
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-
-
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-
-
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-
-
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type: 1677
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reserved: 0
-
-
start_resource: 18
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type: 1677
host_id: 36
reserved: 0
-
-
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num_resource: 2
type: 1677
host_id: 30
reserved: 0
-
-
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num_resource: 6
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reserved: 0
-
-
start_resource: 54
num_resource: 18
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host_id: 12
reserved: 0
-
-
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num_resource: 6
type: 1678
host_id: 35
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-
-
start_resource: 72
num_resource: 6
type: 1678
host_id: 36
reserved: 0
-
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host_id: 30
reserved: 0
-
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num_resource: 2
type: 1678
host_id: 128
reserved: 0
-
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num_resource: 12
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host_id: 12
reserved: 0
-
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num_resource: 6
type: 1679
host_id: 35
reserved: 0
-
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num_resource: 6
type: 1679
host_id: 36
reserved: 0
-
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num_resource: 2
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reserved: 0
-
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host_id: 128
reserved: 0
-
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-
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reserved: 0
-
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type: 1696
host_id: 36
reserved: 0
-
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type: 1696
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reserved: 0
-
-
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num_resource: 6
type: 1696
host_id: 128
reserved: 0
-
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type: 1697
host_id: 12
reserved: 0
-
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type: 1697
host_id: 35
reserved: 0
-
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type: 1697
host_id: 36
reserved: 0
-
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type: 1697
host_id: 30
reserved: 0
-
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type: 1697
host_id: 128
reserved: 0
-
-
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type: 1698
host_id: 12
reserved: 0
-
-
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type: 1698
host_id: 35
reserved: 0
-
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host_id: 36
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-
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host_id: 30
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-
-
start_resource: 5
num_resource: 35
type: 1802
host_id: 12
reserved: 0
-
-
- start_resource: 44
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+ start_resource: 45
+ num_resource: 35
type: 1802
host_id: 35
reserved: 0
-
-
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- num_resource: 36
+ start_resource: 45
+ num_resource: 35
type: 1802
host_id: 36
reserved: 0
-
-
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num_resource: 8
type: 1802
host_id: 30
reserved: 0
-
-
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reserved: 0
-
-
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-
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-
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+ start_resource: 782
num_resource: 128
type: 1805
host_id: 30
reserved: 0
-
-
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- num_resource: 627
+ start_resource: 910
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-
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host_id: 128
reserved: 0
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diff --git a/board/ti/am64x/am64x.env b/board/ti/am64x/am64x.env
index 5958c2ed03..cdb01bb6a1 100644
--- a/board/ti/am64x/am64x.env
+++ b/board/ti/am64x/am64x.env
@@ -1,6 +1,13 @@
#include <environment/ti/ti_armv7_common.env>
#include <environment/ti/mmc.env>
#include <environment/ti/k3_dfu_combined.env>
+#include <environment/ti/nand.env>
+#if CONFIG_CMD_REMOTEPROC
+#include <environment/ti/k3_rproc.env>
+#endif
+
+mtdids=nand0=omap2-nand.0
+mtdparts=omap2-nand.0:2m(NAND.tiboot3),2m(NAND.tispl),2m(NAND.tiboot3.backup),4m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup),-(NAND.file-system)
findfdt=
if test $board_name = am64x_gpevm; then
@@ -21,6 +28,8 @@ bootpart=1:2
bootdir=/boot
rd_spec=-
+rproc_fw_binaries= 0 /lib/firmware/am64-main-r5f0_0-fw 1 /lib/firmware/am64-main-r5f0_1-fw 2 /lib/firmware/am64-main-r5f1_0-fw 3 /lib/firmware/am64-main-r5f1_1-fw
+
args_usb=run finduuid;setenv bootargs console=${console}
${optargs}
root=PARTUUID=${uuid} rw
diff --git a/board/ti/am64x/evm.c b/board/ti/am64x/evm.c
index 577bdfd6f4..12b4f26325 100644
--- a/board/ti/am64x/evm.c
+++ b/board/ti/am64x/evm.c
@@ -35,6 +35,10 @@ enum {
AM64X_EVM_BRD_DET_COUNT,
};
+#define AM642_NAND_DTBO "k3-am642-evm-nand.dtbo"
+
+static struct gpio_desc board_det_gpios[AM64X_EVM_BRD_DET_COUNT];
+
/* Max number of MAC addresses that are parsed/processed per daughter card */
#define DAUGHTER_CARD_NO_OF_MAC_ADDR 8
@@ -67,14 +71,20 @@ int dram_init_banksize(void)
return ret;
}
+static bool is_nand;
#if defined(CONFIG_SPL_LOAD_FIT)
int board_fit_config_name_match(const char *name)
{
bool eeprom_read = board_ti_was_eeprom_read();
if (!eeprom_read || board_is_am64x_gpevm()) {
- if (!strcmp(name, "k3-am642-r5-evm") || !strcmp(name, "k3-am642-evm"))
- return 0;
+ if (is_nand) {
+ if (!strcmp(name, "k3-am642-r5-evm") || !strcmp(name, "k3-am642-evm-nand"))
+ return 0;
+ } else {
+ if (!strcmp(name, "k3-am642-r5-evm") || !strcmp(name, "k3-am642-evm"))
+ return 0;
+ }
} else if (board_is_am64x_skevm()) {
if (!strcmp(name, "k3-am642-r5-sk") || !strcmp(name, "k3-am642-sk"))
return 0;
@@ -236,7 +246,6 @@ static void setup_serial(void)
#endif
#endif
-#ifdef CONFIG_BOARD_LATE_INIT
static const char *k3_dtbo_list[AM64X_MAX_DAUGHTER_CARDS] = {NULL};
static int init_daughtercard_det_gpio(char *gpio_name, struct gpio_desc *desc)
@@ -264,7 +273,6 @@ static int init_daughtercard_det_gpio(char *gpio_name, struct gpio_desc *desc)
static int probe_daughtercards(void)
{
struct ti_am6_eeprom ep;
- struct gpio_desc board_det_gpios[AM64X_EVM_BRD_DET_COUNT];
char mac_addr[DAUGHTER_CARD_NO_OF_MAC_ADDR][TI_EEPROM_HDR_ETH_ALEN];
u8 mac_addr_cnt;
char name_overlays[1024] = { 0 };
@@ -292,7 +300,7 @@ static int probe_daughtercards(void)
{
AM64X_EVM_HSE_BRD_DET,
"TMDS64DC02EVM",
- "k3-am642-evm-nand.dtbo",
+ AM642_NAND_DTBO,
0,
},
};
@@ -373,6 +381,9 @@ static int probe_daughtercards(void)
dtboname = cards[i].dtbo_name;
k3_dtbo_list[nb_dtbos++] = dtboname;
+ if (!strcmp(dtboname, AM642_NAND_DTBO))
+ is_nand = true;
+
/*
* Make sure we are not running out of buffer space by checking
* if we can fit the new overlay, a trailing space to be used
@@ -396,6 +407,7 @@ static int probe_daughtercards(void)
return 0;
}
+#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
@@ -434,5 +446,9 @@ void spl_board_init(void)
/* Init DRAM size for R5/A53 SPL */
dram_init_banksize();
+
+ /* Check for and probe any plugged-in daughtercards */
+ if (board_is_am64x_gpevm())
+ probe_daughtercards();
}
#endif
diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig
index 49edd98014..56a65c0a40 100644
--- a/board/ti/common/Kconfig
+++ b/board/ti/common/Kconfig
@@ -1,3 +1,11 @@
+config BOARD_HAS_32K_RTC_CRYSTAL
+ bool "Enable the 32k crystial for RTC"
+ help
+ Some of Texas Instrument's Starter-Kit boards have
+ an onboard 32k crystal. Select this option if you wish Uboot
+ to enable this crystal for Linux
+ default n
+
config TI_I2C_BOARD_DETECT
bool "Support for Board detection for TI platforms"
help
diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c
index 9a53884c98..17fe8f8069 100644
--- a/board/ti/common/board_detect.c
+++ b/board/ti/common/board_detect.c
@@ -128,7 +128,7 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr,
rc = dm_i2c_read(dev, 0x1, &offset_test, sizeof(offset_test));
- if (*((u32 *)ep) != (header & 0xFF))
+ if (offset_test != ((header >> 8) & 0xFF))
one_byte_addressing = false;
/* Corrupted data??? */
diff --git a/board/ti/common/rtc.c b/board/ti/common/rtc.c
new file mode 100644
index 0000000000..e117a92776
--- /dev/null
+++ b/board/ti/common/rtc.c
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * RTC setup for TI Platforms
+ *
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <log.h>
+
+#define WKUP_CTRLMMR_DBOUNCE_CFG1 0x04504084
+#define WKUP_CTRLMMR_DBOUNCE_CFG2 0x04504088
+#define WKUP_CTRLMMR_DBOUNCE_CFG3 0x0450408c
+#define WKUP_CTRLMMR_DBOUNCE_CFG4 0x04504090
+#define WKUP_CTRLMMR_DBOUNCE_CFG5 0x04504094
+#define WKUP_CTRLMMR_DBOUNCE_CFG6 0x04504098
+
+void board_rtc_init(void)
+{
+ u32 val;
+
+ /* We have 32k crystal, so lets enable it */
+ val = readl(MCU_CTRL_LFXOSC_CTRL);
+ val &= ~(MCU_CTRL_LFXOSC_32K_DISABLE_VAL);
+ writel(val, MCU_CTRL_LFXOSC_CTRL);
+
+ /* Add any TRIM needed for the crystal here.. */
+ /* Make sure to mux up to take the SoC 32k from the crystal */
+ writel(MCU_CTRL_DEVICE_CLKOUT_LFOSC_SELECT_VAL,
+ MCU_CTRL_DEVICE_CLKOUT_32K_CTRL);
+
+ /* Setup debounce conf registers - arbitrary values.
+ * Times are approx
+ */
+ /* 1.9ms debounce @ 32k */
+ writel(WKUP_CTRLMMR_DBOUNCE_CFG1, 0x1);
+ /* 5ms debounce @ 32k */
+ writel(WKUP_CTRLMMR_DBOUNCE_CFG2, 0x5);
+ /* 20ms debounce @ 32k */
+ writel(WKUP_CTRLMMR_DBOUNCE_CFG3, 0x14);
+ /* 46ms debounce @ 32k */
+ writel(WKUP_CTRLMMR_DBOUNCE_CFG4, 0x18);
+ /* 100ms debounce @ 32k */
+ writel(WKUP_CTRLMMR_DBOUNCE_CFG5, 0x1c);
+ /* 156ms debounce @ 32k */
+ writel(WKUP_CTRLMMR_DBOUNCE_CFG6, 0x1f);
+}
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index e82349ef24..d0077cebc4 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -571,10 +571,13 @@ void spl_board_init(void)
if (board_ti_k3_is("J721EX-PM2-SOM") ||
board_ti_k3_is("J7200X-PM2-SOM") ||
board_is_bboneai_64_b0()) {
- ret = uclass_get_device_by_driver(UCLASS_MISC,
- DM_DRIVER_GET(k3_esm), &dev);
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@700000", &dev);
+ if (ret)
+ printf("MISC init for esm@700000 failed: %d\n", ret);
+
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@40800000", &dev);
if (ret)
- printf("ESM init failed: %d\n", ret);
+ printf("MISC init for esm@40800000 failed: %d\n", ret);
}
#endif
diff --git a/board/ti/j721e/j721e.env b/board/ti/j721e/j721e.env
index 492e6ae3c7..4f91859c2e 100644
--- a/board/ti/j721e/j721e.env
+++ b/board/ti/j721e/j721e.env
@@ -68,9 +68,9 @@ main_cpsw0_qsgmii_phyinit=
#endif
#if CONFIG_TARGET_J721E_A72_EVM
-rproc_fw_binaries=2 /lib/firmware/j7-main-r5f0_0-fw 3 /lib/firmware/j7-main-r5f0_1-fw 4 /lib/firmware/j7-main-r5f1_0-fw 5 /lib/firmware/j7-main-r5f1_1-fw 6 /lib/firmware/j7-c66_0-fw 7 /lib/firmware/j7-c66_1-fw 8 /lib/firmware/j7-c71_0-fw
+rproc_fw_binaries= 1 /lib/firmware/j7-mcu-r5f0_1-fw 2 /lib/firmware/j7-main-r5f0_0-fw 3 /lib/firmware/j7-main-r5f0_1-fw 4 /lib/firmware/j7-main-r5f1_0-fw 5 /lib/firmware/j7-main-r5f1_1-fw 6 /lib/firmware/j7-c66_0-fw 7 /lib/firmware/j7-c66_1-fw 8 /lib/firmware/j7-c71_0-fw
#endif
#if CONFIG_TARGET_J7200_A72_EVM
-rproc_fw_binaries=2 /lib/firmware/j7200-main-r5f0_0-fw 3 /lib/firmware/j7200-main-r5f0_1-fw
+rproc_fw_binaries= 1 /lib/firmware/j7200-mcu-r5f0_1-fw 2 /lib/firmware/j7200-main-r5f0_0-fw 3 /lib/firmware/j7200-main-r5f0_1-fw
#endif
diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index 66d5b219b5..eea2c256b3 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -73,46 +73,41 @@ int dram_init_banksize(void)
return 0;
}
-#if CONFIG_IS_ENABLED(DM_GPIO) && CONFIG_IS_ENABLED(OF_LIBFDT)
/* Enables the spi-nand dts node, if onboard mux is set to spinand */
static void __maybe_unused detect_enable_spinand(void *blob)
{
- struct gpio_desc desc = {0};
- char *ospi_mux_sel_gpio = "6";
- int offset;
-
- if (dm_gpio_lookup_name(ospi_mux_sel_gpio, &desc))
- return;
-
- if (dm_gpio_request(&desc, ospi_mux_sel_gpio))
- return;
-
- if (dm_gpio_set_dir_flags(&desc, GPIOD_IS_IN))
- return;
-
- if (dm_gpio_get_value(&desc)) {
- offset = fdt_node_offset_by_compatible(blob, -1, "spi-nand");
- fdt_status_okay(blob, offset);
-
- offset = fdt_first_subnode(blob,
- fdt_parent_offset(blob, offset));
- while (offset > 0) {
- if (!fdt_node_check_compatible(blob, offset,
- "jedec,spi-nor"))
- fdt_status_disabled(blob, offset);
-
- offset = fdt_next_subnode(blob, offset);
+ if (IS_ENABLED(CONFIG_DM_GPIO) && IS_ENABLED(CONFIG_OF_LIBFDT)) {
+ struct gpio_desc desc = {0};
+ char *ospi_mux_sel_gpio = "6";
+ int nand_offset, nor_offset;
+
+ if (dm_gpio_lookup_name(ospi_mux_sel_gpio, &desc))
+ return;
+
+ if (dm_gpio_request(&desc, ospi_mux_sel_gpio))
+ return;
+
+ if (dm_gpio_set_dir_flags(&desc, GPIOD_IS_IN))
+ return;
+
+ nand_offset = fdt_node_offset_by_compatible(blob, -1, "spi-nand");
+ nor_offset = fdt_node_offset_by_compatible(blob,
+ fdt_parent_offset(blob, nand_offset),
+ "jedec,spi-nor");
+
+ if (dm_gpio_get_value(&desc)) {
+ fdt_status_okay(blob, nand_offset);
+ fdt_del_node(blob, nor_offset);
+ } else {
+ fdt_del_node(blob, nand_offset);
}
}
}
-#endif
-#if defined(CONFIG_SPL_BUILD) && (defined(CONFIG_TARGET_J721S2_A72_EVM) || \
- defined(CONFIG_TARGET_J721S2_R5_EVM))
+#if defined(CONFIG_SPL_BUILD)
void spl_perform_fixups(struct spl_image_info *spl_image)
{
- if (IS_ENABLED(CONFIG_DM_GPIO) && IS_ENABLED(CONFIG_OF_LIBFDT))
- detect_enable_spinand(spl_image->fdt_addr);
+ detect_enable_spinand(spl_image->fdt_addr);
}
#endif
@@ -128,8 +123,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
if (ret)
printf("%s: fixing up msmc ram failed %d\n", __func__, ret);
- if (IS_ENABLED(CONFIG_DM_GPIO) && IS_ENABLED(CONFIG_OF_LIBFDT))
- detect_enable_spinand(blob);
+ detect_enable_spinand(blob);
return ret;
}
@@ -381,8 +375,46 @@ int board_late_init(void)
return 0;
}
+ofnode cadence_qspi_get_subnode(struct udevice *dev)
+{
+ if (IS_ENABLED(CONFIG_SPL_BUILD) &&
+ IS_ENABLED(CONFIG_TARGET_J721S2_R5_EVM)) {
+ if (spl_boot_device() == BOOT_DEVICE_SPINAND)
+ return ofnode_by_compatible(dev_ofnode(dev), "spi-nand");
+ }
+
+ return dev_read_first_subnode(dev);
+}
+
void spl_board_init(void)
{
+ struct udevice *dev;
+ int ret;
+
+ if (IS_ENABLED(CONFIG_ESM_K3)) {
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@700000",
+ &dev);
+ if (ret)
+ printf("MISC init for esm@700000 failed: %d\n", ret);
+
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@40800000",
+ &dev);
+ if (ret)
+ printf("MISC init for esm@40800000 failed: %d\n", ret);
+
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@42080000",
+ &dev);
+ if (ret)
+ printf("MISC init for esm@42080000 failed: %d\n", ret);
+ }
+
+ if (IS_ENABLED(CONFIG_ESM_PMIC) && !board_is_am68_sk_som()) {
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_DRIVER_GET(pmic_esm),
+ &dev);
+ if (ret)
+ printf("ESM PMIC init failed: %d\n", ret);
+ }
}
/* Support for the various EVM / SK families */
diff --git a/board/ti/j721s2/j721s2.env b/board/ti/j721s2/j721s2.env
index ef683ae7c6..1366f176fc 100644
--- a/board/ti/j721s2/j721s2.env
+++ b/board/ti/j721s2/j721s2.env
@@ -35,7 +35,7 @@ name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw
#endif
rd_spec=-
-rproc_fw_binaries= 2 /lib/firmware/j721s2-main-r5f0_0-fw 3 /lib/firmware/j721s2-main-r5f0_1-fw 4 /lib/firmware/j721s2-main-r5f1_0-fw 5 /lib/firmware/j721s2-main-r5f1_1-fw 6 /lib/firmware/j721s2-c71_0-fw 7 /lib/firmware/j721s2-c71_1-fw
+rproc_fw_binaries= 1 /lib/firmware/j721s2-mcu-r5f0_1-fw 2 /lib/firmware/j721s2-main-r5f0_0-fw 3 /lib/firmware/j721s2-main-r5f0_1-fw 4 /lib/firmware/j721s2-main-r5f1_0-fw 5 /lib/firmware/j721s2-main-r5f1_1-fw 6 /lib/firmware/j721s2-c71_0-fw 7 /lib/firmware/j721s2-c71_1-fw
mtdids=nor0=47040000.spi.0,nand0=spi-nand0
mtdparts=mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),256k(ospi.env.backup),57088k@8m(ospi.rootfs),256k(ospi.phypattern);spi-nand0:512k(ospi_nand.tiboot3),2m(ospi_nand.tispl),4m(ospi_nand.u-boot),256k(ospi_nand.env),256k(ospi_nand.env.backup),98048k@32m(ospi_nand.rootfs),256k@130816k(ospi_nand.phypattern)
diff --git a/board/ti/j784s4/evm.c b/board/ti/j784s4/evm.c
index a59adaf051..8f8cb4f1cf 100644
--- a/board/ti/j784s4/evm.c
+++ b/board/ti/j784s4/evm.c
@@ -72,6 +72,44 @@ int dram_init_banksize(void)
return 0;
}
+/* Enables the spi-nand dts node, if onboard mux is set to spinand */
+static void __maybe_unused detect_enable_spinand(void *blob)
+{
+ if (IS_ENABLED(CONFIG_DM_GPIO) && IS_ENABLED(CONFIG_OF_LIBFDT)) {
+ struct gpio_desc desc = {0};
+ char *ospi_mux_sel_gpio = "6";
+ int nand_offset, nor_offset;
+
+ if (dm_gpio_lookup_name(ospi_mux_sel_gpio, &desc))
+ return;
+
+ if (dm_gpio_request(&desc, ospi_mux_sel_gpio))
+ return;
+
+ if (dm_gpio_set_dir_flags(&desc, GPIOD_IS_IN))
+ return;
+
+ nand_offset = fdt_node_offset_by_compatible(blob, -1, "spi-nand");
+ nor_offset = fdt_node_offset_by_compatible(blob,
+ fdt_parent_offset(blob, nand_offset),
+ "jedec,spi-nor");
+
+ if (dm_gpio_get_value(&desc)) {
+ fdt_status_okay(blob, nand_offset);
+ fdt_del_node(blob, nor_offset);
+ } else {
+ fdt_del_node(blob, nand_offset);
+ }
+ }
+}
+
+#if defined(CONFIG_SPL_BUILD)
+void spl_perform_fixups(struct spl_image_info *spl_image)
+{
+ detect_enable_spinand(spl_image->fdt_addr);
+}
+#endif
+
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
int ft_board_setup(void *blob, struct bd_info *bd)
{
@@ -84,6 +122,8 @@ int ft_board_setup(void *blob, struct bd_info *bd)
if (ret)
printf("%s: fixing up msmc ram failed %d\n", __func__, ret);
+ detect_enable_spinand(blob);
+
return ret;
}
#endif
@@ -93,7 +133,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
/*
* Functions specific to EVM and SK designs of J784S4/AM69 family.
*/
-#define board_is_j784s4_evm() board_ti_k3_is("J784S4-EVM")
+#define board_is_j784s4_evm() board_ti_k3_is("J784S4X-EVM")
#define board_is_am69_sk() board_ti_k3_is("AM69-SK")
@@ -141,7 +181,7 @@ static void setup_board_eeprom_env(void)
if (board_is_am69_sk())
name = "am69-sk";
- else
+ else if (!board_is_j784s4_evm())
printf("Unidentified board claims %s in eeprom header\n",
board_ti_get_name());
@@ -198,6 +238,44 @@ int board_late_init(void)
return 0;
}
+ofnode cadence_qspi_get_subnode(struct udevice *dev)
+{
+ if (IS_ENABLED(CONFIG_SPL_BUILD) &&
+ IS_ENABLED(CONFIG_TARGET_J784S4_R5_EVM)) {
+ if (spl_boot_device() == BOOT_DEVICE_SPINAND)
+ return ofnode_by_compatible(dev_ofnode(dev), "spi-nand");
+ }
+
+ return dev_read_first_subnode(dev);
+}
+
void spl_board_init(void)
{
+ struct udevice *dev;
+ int ret;
+
+ if (IS_ENABLED(CONFIG_ESM_K3)) {
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@700000",
+ &dev);
+ if (ret)
+ printf("MISC init for esm@700000 failed: %d\n", ret);
+
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@40800000",
+ &dev);
+ if (ret)
+ printf("MISC init for esm@40800000 failed: %d\n", ret);
+
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@42080000",
+ &dev);
+ if (ret)
+ printf("MISC init for esm@42080000 failed: %d\n", ret);
+ }
+
+ if (IS_ENABLED(CONFIG_ESM_PMIC)) {
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_DRIVER_GET(pmic_esm),
+ &dev);
+ if (ret)
+ printf("ESM PMIC init failed: %d\n", ret);
+ }
}
diff --git a/board/ti/j784s4/j784s4.env b/board/ti/j784s4/j784s4.env
index 916f376bea..49772d89ea 100644
--- a/board/ti/j784s4/j784s4.env
+++ b/board/ti/j784s4/j784s4.env
@@ -2,6 +2,7 @@
#include <environment/ti/mmc.env>
#include <environment/ti/ufs.env>
#include <environment/ti/k3_dfu.env>
+#include <environment/ti/ospi_nand.env>
#if CONFIG_CMD_REMOTEPROC
#include <environment/ti/k3_rproc.env>
@@ -28,9 +29,25 @@ bootpart=1:2
bootdir=/boot
rd_spec=-
-rproc_fw_binaries= 2 /lib/firmware/j784s4-main-r5f0_0-fw 3 /lib/firmware/j784s4-main-r5f0_1-fw 4 /lib/firmware/j784s4-main-r5f1_0-fw 5 /lib/firmware/j784s4-main-r5f1_1-fw 6 /lib/firmware/j784s4-main-r5f2_0-fw 7 /lib/firmware/j784s4-main-r5f2_1-fw 8 /lib/firmware/j784s4-c71_0-fw 9 /lib/firmware/j784s4-c71_1-fw 10 /lib/firmware/j784s4-c71_2-fw 11 /lib/firmware/j784s4-c71_3-fw
+#if CONFIG_TARGET_J784S4_A72_EVM
+do_main_cpsw0_qsgmii_phyinit=1
+init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;
+ gpio clear gpio@22_16
+main_cpsw0_qsgmii_phyinit=
+ if test $board_name = j784s4; then
+ do_main_cpsw0_qsgmii_phyinit=1; else
+ do_main_cpsw0_qsgmii_phyinit=0; fi;
+ if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && test ${boot} = mmc; then
+ run init_main_cpsw0_qsgmii_phy;
+ fi;
+#endif
+
+rproc_fw_binaries= 1 /lib/firmware/j784s4-mcu-r5f0_1-fw 2 /lib/firmware/j784s4-main-r5f0_0-fw 3 /lib/firmware/j784s4-main-r5f0_1-fw 4 /lib/firmware/j784s4-main-r5f1_0-fw 5 /lib/firmware/j784s4-main-r5f1_1-fw 6 /lib/firmware/j784s4-main-r5f2_0-fw 7 /lib/firmware/j784s4-main-r5f2_1-fw 8 /lib/firmware/j784s4-c71_0-fw 9 /lib/firmware/j784s4-c71_1-fw 10 /lib/firmware/j784s4-c71_2-fw 11 /lib/firmware/j784s4-c71_3-fw
splashfile=ti.gz
splashimage=0x82000000
splashpos=m,m
splashsource=mmc
+
+mtdids=nor0=47040000.spi.0,nand0=spi-nand0
+mtdparts=mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),256k(ospi.env.backup),57088k@8m(ospi.rootfs),256k(ospi.phypattern);spi-nand0:512k(ospi_nand.tiboot3),2m(ospi_nand.tispl),4m(ospi_nand.u-boot),256k(ospi_nand.env),256k(ospi_nand.env.backup),98048k@32m(ospi_nand.rootfs),256k@130816k(ospi_nand.phypattern)