diff options
| author | Bryan Brattlof <bb@ti.com> | 2023-11-07 17:30:37 -0600 |
|---|---|---|
| committer | Praneeth Bajjuri <praneeth@ti.com> | 2023-11-07 17:55:03 -0600 |
| commit | d36ad81d25a9929a79aad63a56987625dac4131a (patch) | |
| tree | dc80314afb5ca0dc24bb8a07b8202fbb4ebc74d3 /board | |
| parent | 43d7c74e786cad9dd17f96c91b742d0144e3a84b (diff) | |
board: ti: common: add rtc setup to common folder
All of the starter kit boards for the am62xxx extended family utilize
the same 32k crystal oscillator for a more accurate clock for the RTC
instance. Add the setup the clock mux and debounce configuration to the
common board directory so the entire am62xxx extended family can utilize
it.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/ti/common/Kconfig | 8 | ||||
| -rw-r--r-- | board/ti/common/rtc.c | 47 |
2 files changed, 55 insertions, 0 deletions
diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig index 49edd98014..56a65c0a40 100644 --- a/board/ti/common/Kconfig +++ b/board/ti/common/Kconfig @@ -1,3 +1,11 @@ +config BOARD_HAS_32K_RTC_CRYSTAL + bool "Enable the 32k crystial for RTC" + help + Some of Texas Instrument's Starter-Kit boards have + an onboard 32k crystal. Select this option if you wish Uboot + to enable this crystal for Linux + default n + config TI_I2C_BOARD_DETECT bool "Support for Board detection for TI platforms" help diff --git a/board/ti/common/rtc.c b/board/ti/common/rtc.c new file mode 100644 index 0000000000..e117a92776 --- /dev/null +++ b/board/ti/common/rtc.c @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * RTC setup for TI Platforms + * + * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ + */ +#include <asm/arch/hardware.h> +#include <asm/io.h> +#include <log.h> + +#define WKUP_CTRLMMR_DBOUNCE_CFG1 0x04504084 +#define WKUP_CTRLMMR_DBOUNCE_CFG2 0x04504088 +#define WKUP_CTRLMMR_DBOUNCE_CFG3 0x0450408c +#define WKUP_CTRLMMR_DBOUNCE_CFG4 0x04504090 +#define WKUP_CTRLMMR_DBOUNCE_CFG5 0x04504094 +#define WKUP_CTRLMMR_DBOUNCE_CFG6 0x04504098 + +void board_rtc_init(void) +{ + u32 val; + + /* We have 32k crystal, so lets enable it */ + val = readl(MCU_CTRL_LFXOSC_CTRL); + val &= ~(MCU_CTRL_LFXOSC_32K_DISABLE_VAL); + writel(val, MCU_CTRL_LFXOSC_CTRL); + + /* Add any TRIM needed for the crystal here.. */ + /* Make sure to mux up to take the SoC 32k from the crystal */ + writel(MCU_CTRL_DEVICE_CLKOUT_LFOSC_SELECT_VAL, + MCU_CTRL_DEVICE_CLKOUT_32K_CTRL); + + /* Setup debounce conf registers - arbitrary values. + * Times are approx + */ + /* 1.9ms debounce @ 32k */ + writel(WKUP_CTRLMMR_DBOUNCE_CFG1, 0x1); + /* 5ms debounce @ 32k */ + writel(WKUP_CTRLMMR_DBOUNCE_CFG2, 0x5); + /* 20ms debounce @ 32k */ + writel(WKUP_CTRLMMR_DBOUNCE_CFG3, 0x14); + /* 46ms debounce @ 32k */ + writel(WKUP_CTRLMMR_DBOUNCE_CFG4, 0x18); + /* 100ms debounce @ 32k */ + writel(WKUP_CTRLMMR_DBOUNCE_CFG5, 0x1c); + /* 156ms debounce @ 32k */ + writel(WKUP_CTRLMMR_DBOUNCE_CFG6, 0x1f); +} |