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authorNeha Malcom Francis <n-francis@ti.com>2023-05-25 15:47:19 +0530
committerPraneeth Bajjuri <praneeth@ti.com>2023-05-25 06:44:54 -0500
commitc6dff4b1a12690ef4f1b85de57651401d5685469 (patch)
tree644f064574a0de7d6e1acbb5c2be18752cb29577 /board
parent262a505ad23d9ac33d352556afc1c26d17fd3591 (diff)
j7200: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img
Support added for HS and GP boot binaries for J7200. tiboot3.bin, tispl.bin and u-boot.img: For HS-SE devices tiboot3.bin_fs, tispl.bin and u-boot.img: For HS-FS devices tiboot3.bin_unsigned, tispl.bin_unsigned and u-boot.img_unsigned: For GP devices It is to be noted that the bootflow followed by J7200 requires: tiboot3.bin: * R5 SPL * R5 SPL dtbs * TIFS * board-cfg * pm-cfg * sec-cfg * rm-cfg tispl.bin: * DM * ATF * OPTEE * A72 SPL * A72 SPL dtbs u-boot.img: * A72 U-Boot * A72 U-Boot dtbs Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board')
-rw-r--r--board/ti/j721e/Kconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig
index 4a127c4a10..e6cb21f77b 100644
--- a/board/ti/j721e/Kconfig
+++ b/board/ti/j721e/Kconfig
@@ -33,6 +33,7 @@ config TARGET_J7200_A72_EVM
select BOARD_LATE_INIT
imply TI_I2C_BOARD_DETECT
select SYS_DISABLE_DCACHE_OPS
+ select BINMAN
config TARGET_J7200_R5_EVM
bool "TI K3 based J7200 EVM running on R5"
@@ -42,6 +43,7 @@ config TARGET_J7200_R5_EVM
select RAM
select SPL_RAM
select K3_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT