MLK-20528-2 imx8: Enable clocks LPCG

To support partition reboot, the u-boot has to enable clocks by LPCG.
The LPCG will reset to default value only when the subsystem is totally
power off and reset. However, the resources in one subsystem may belong
to different partitions, so the partition reboot may not reboot the entire
subsystem.
Powers, clocks/lpcg, GPR, IP may not reset depends on various cases and
HW design. Thus, AP software has to ensure everything is reset by SW
itself to support such above cases.

Signed-off-by: Ye Li <ye.li@nxp.com>

4 files changed, 52 insertions, 0 deletions

diff --git a/board/freescale/imx8qm_arm2/imx8qm_arm2.c b/board/freescale/imx8qm_arm2/imx8qm_arm2.c
index 6827b57a647..911485e5dcc 100644
--- a/board/freescale/imx8qm_arm2/imx8qm_arm2.c
+++ b/board/freescale/imx8qm_arm2/imx8qm_arm2.c
@@ -29,6 +29,7 @@
 #include <asm/arch/video_common.h>
 #include <power-domain.h>
 #include <cdns3-uboot.h>
+#include <asm/arch/lpcg.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -90,6 +91,8 @@ int board_early_init_f(void)
 	if (sciErr != SC_ERR_NONE)
 		return 0;
 
+	LPCG_AllClockOn(LPUART_0_LPCG);
+
 	setup_iomux_uart();
 
 	return 0;
@@ -485,6 +488,19 @@ static void imx8qm_hsio_initialize(void)
 			 printf("hsio_gpio Power up failed! (error = %d)\n", ret);
 	}
 
+	LPCG_AllClockOn(HSIO_PCIE_X2_LPCG);
+	LPCG_AllClockOn(HSIO_PCIE_X1_LPCG);
+	LPCG_AllClockOn(HSIO_SATA_LPCG);
+	LPCG_AllClockOn(HSIO_PHY_X2_LPCG);
+	LPCG_AllClockOn(HSIO_PHY_X1_LPCG);
+	LPCG_AllClockOn(HSIO_PHY_X2_CRR0_LPCG);
+	LPCG_AllClockOn(HSIO_PHY_X1_CRR1_LPCG);
+	LPCG_AllClockOn(HSIO_PCIE_X2_CRR2_LPCG);
+	LPCG_AllClockOn(HSIO_PCIE_X1_CRR3_LPCG);
+	LPCG_AllClockOn(HSIO_SATA_CRR4_LPCG);
+	LPCG_AllClockOn(HSIO_MISC_LPCG);
+	LPCG_AllClockOn(HSIO_GPIO_LPCG);
+
 	imx8_iomux_setup_multiple_pads(board_pcie_pins, ARRAY_SIZE(board_pcie_pins));
 
 }
diff --git a/board/freescale/imx8qm_mek/imx8qm_mek.c b/board/freescale/imx8qm_mek/imx8qm_mek.c
index 943bb2f7929..2efec397360 100644
--- a/board/freescale/imx8qm_mek/imx8qm_mek.c
+++ b/board/freescale/imx8qm_mek/imx8qm_mek.c
@@ -29,6 +29,7 @@
 #include <power-domain.h>
 #include "../common/tcpc.h"
 #include <cdns3-uboot.h>
+#include <asm/arch/lpcg.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -87,6 +88,8 @@ int board_early_init_f(void)
 	if (sciErr != SC_ERR_NONE)
 		return 0;
 
+	LPCG_AllClockOn(LPUART_0_LPCG);
+
 	setup_iomux_uart();
 
 	return 0;
@@ -267,6 +270,19 @@ static void imx8qm_hsio_initialize(void)
 			 printf("hsio_gpio Power up failed! (error = %d)\n", ret);
 	}
 
+	LPCG_AllClockOn(HSIO_PCIE_X2_LPCG);
+	LPCG_AllClockOn(HSIO_PCIE_X1_LPCG);
+	LPCG_AllClockOn(HSIO_SATA_LPCG);
+	LPCG_AllClockOn(HSIO_PHY_X2_LPCG);
+	LPCG_AllClockOn(HSIO_PHY_X1_LPCG);
+	LPCG_AllClockOn(HSIO_PHY_X2_CRR0_LPCG);
+	LPCG_AllClockOn(HSIO_PHY_X1_CRR1_LPCG);
+	LPCG_AllClockOn(HSIO_PCIE_X2_CRR2_LPCG);
+	LPCG_AllClockOn(HSIO_PCIE_X1_CRR3_LPCG);
+	LPCG_AllClockOn(HSIO_SATA_CRR4_LPCG);
+	LPCG_AllClockOn(HSIO_MISC_LPCG);
+	LPCG_AllClockOn(HSIO_GPIO_LPCG);
+
 	imx8_iomux_setup_multiple_pads(board_pcie_pins, ARRAY_SIZE(board_pcie_pins));
 }
 
diff --git a/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c b/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c
index 39be56f262b..e448001d7cd 100644
--- a/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c
+++ b/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c
@@ -30,6 +30,7 @@
 #include <asm/arch/video_common.h>
 #include <power-domain.h>
 #include <cdns3-uboot.h>
+#include <asm/arch/lpcg.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -162,6 +163,8 @@ int board_early_init_f(void)
 	if (sciErr != SC_ERR_NONE)
 		return 0;
 
+	LPCG_AllClockOn(LPUART_0_LPCG);
+
 	setup_iomux_uart();
 
 #ifdef CONFIG_SPL_BUILD
@@ -512,6 +515,13 @@ static void imx8qxp_hsio_initialize(void)
 			printf("hsio_gpio Power up failed! (error = %d)\n", ret);
 	}
 
+	LPCG_AllClockOn(HSIO_PCIE_X1_LPCG);
+	LPCG_AllClockOn(HSIO_PHY_X1_LPCG);
+	LPCG_AllClockOn(HSIO_PHY_X1_CRR1_LPCG);
+	LPCG_AllClockOn(HSIO_PCIE_X1_CRR3_LPCG);
+	LPCG_AllClockOn(HSIO_MISC_LPCG);
+	LPCG_AllClockOn(HSIO_GPIO_LPCG);
+
 	imx8_iomux_setup_multiple_pads(board_pcie_pins, ARRAY_SIZE(board_pcie_pins));
 }
 
diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
index 6f0a75e774d..71e882b8992 100644
--- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c
+++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
@@ -30,6 +30,7 @@
 #include <power-domain.h>
 #include "../common/tcpc.h"
 #include <cdns3-uboot.h>
+#include <asm/arch/lpcg.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -91,6 +92,8 @@ int board_early_init_f(void)
 	if (sciErr != SC_ERR_NONE)
 		return 0;
 
+	LPCG_AllClockOn(LPUART_0_LPCG);
+
 	setup_iomux_uart();
 
 	return 0;
@@ -398,6 +401,13 @@ static void imx8qxp_hsio_initialize(void)
 			 printf("hsio_gpio Power up failed! (error = %d)\n", ret);
 	}
 
+	LPCG_AllClockOn(HSIO_PCIE_X1_LPCG);
+	LPCG_AllClockOn(HSIO_PHY_X1_LPCG);
+	LPCG_AllClockOn(HSIO_PHY_X1_CRR1_LPCG);
+	LPCG_AllClockOn(HSIO_PCIE_X1_CRR3_LPCG);
+	LPCG_AllClockOn(HSIO_MISC_LPCG);
+	LPCG_AllClockOn(HSIO_GPIO_LPCG);
+
 	imx8_iomux_setup_multiple_pads(board_pcie_pins, ARRAY_SIZE(board_pcie_pins));
 }