summaryrefslogtreecommitdiff
path: root/board
diff options
context:
space:
mode:
authorIgor Opaniuk <igor.opaniuk@toradex.com>2020-09-18 14:40:40 +0300
committerDenys Drozdov <denys.drozdov@toradex.com>2021-01-08 19:42:08 +0200
commitaae740ee4f3122bc5bd21f32d337014889d27a93 (patch)
treed6d1710f212cd4e4687febf1d2b170fda7d08c6d /board
parent9069ec716bc7a3fb534a645bbd055dd2925478ac (diff)
apalis-imx8x: add implementation for board_mem_get_layout
Add implementation of board_mem_get_layout for overriding the memory layout. Relates-to: ELB-3031 Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Diffstat (limited to 'board')
-rw-r--r--board/toradex/apalis-imx8x/apalis-imx8x.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/board/toradex/apalis-imx8x/apalis-imx8x.c b/board/toradex/apalis-imx8x/apalis-imx8x.c
index d24ef313aea..493fd126df6 100644
--- a/board/toradex/apalis-imx8x/apalis-imx8x.c
+++ b/board/toradex/apalis-imx8x/apalis-imx8x.c
@@ -49,6 +49,29 @@ static void setup_iomux_uart(void)
imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
}
+void board_mem_get_layout(uint64_t *phys_sdram_1_start,
+ uint64_t *phys_sdram_1_size,
+ uint64_t *phys_sdram_2_start,
+ uint64_t *phys_sdram_2_size)
+{
+ uint32_t is_dualx = 0, val = 0;
+ sc_err_t sciErr = sc_misc_otp_fuse_read(-1, 6, &val);
+
+ if (sciErr == SC_ERR_NONE) {
+ /* DX has two A35 cores disabled */
+ is_dualx = (val & 0xf) != 0x0;
+ }
+
+ *phys_sdram_1_start = PHYS_SDRAM_1;
+ if (is_dualx)
+ /* Our DX based SKUs only have 1 GB RAM */
+ *phys_sdram_1_size = SZ_1G;
+ else
+ *phys_sdram_1_size = PHYS_SDRAM_1_SIZE;
+ *phys_sdram_2_start = PHYS_SDRAM_2;
+ *phys_sdram_2_size = PHYS_SDRAM_2_SIZE;
+}
+
int board_early_init_f(void)
{
sc_pm_clock_rate_t rate = SC_80MHZ;