m68k: Remove M54455EVB board

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Angelo Durgehello <angelo.dureghello@timesys.com>
Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

6 files changed, 0 insertions, 756 deletions

diff --git a/board/freescale/m54455evb/Kconfig b/board/freescale/m54455evb/Kconfig
deleted file mode 100644
index 096bce8312..0000000000
--- a/board/freescale/m54455evb/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_M54455EVB
-
-config SYS_CPU
-	default "mcf5445x"
-
-config SYS_BOARD
-	default "m54455evb"
-
-config SYS_VENDOR
-	default "freescale"
-
-config SYS_CONFIG_NAME
-	default "M54455EVB"
-
-endif
diff --git a/board/freescale/m54455evb/MAINTAINERS b/board/freescale/m54455evb/MAINTAINERS
deleted file mode 100644
index 27ced3c7b1..0000000000
--- a/board/freescale/m54455evb/MAINTAINERS
+++ /dev/null
@@ -1,10 +0,0 @@
-M54455EVB BOARD
-M:	TsiChung Liew <Tsi-Chung.Liew@nxp.com>
-S:	Maintained
-F:	board/freescale/m54455evb/
-F:	include/configs/M54455EVB.h
-F:	configs/M54455EVB_defconfig
-F:	configs/M54455EVB_a66_defconfig
-F:	configs/M54455EVB_i66_defconfig
-F:	configs/M54455EVB_intel_defconfig
-F:	configs/M54455EVB_stm33_defconfig
diff --git a/board/freescale/m54455evb/Makefile b/board/freescale/m54455evb/Makefile
deleted file mode 100644
index eff8ab0660..0000000000
--- a/board/freescale/m54455evb/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-
-obj-y	= m54455evb.o
-extra-y	+= sbf_dram_init.o
diff --git a/board/freescale/m54455evb/README b/board/freescale/m54455evb/README
deleted file mode 100644
index 26d3cc81fd..0000000000
--- a/board/freescale/m54455evb/README
+++ /dev/null
@@ -1,407 +0,0 @@
-Freescale MCF54455EVB ColdFire Development Board
-================================================
-
-TsiChung Liew(Tsi-Chung.Liew@freescale.com)
-Created 4/08/07
-===========================================
-
-
-Changed files:
-==============
-
-- board/freescale/m54455evb/m54455evb.c	Dram setup, IDE pre init, and PCI init
-- board/freescale/m54455evb/flash.c		Atmel and INTEL flash support
-- board/freescale/m54455evb/Makefile		Makefile
-- board/freescale/m54455evb/config.mk	config make
-- board/freescale/m54455evb/u-boot.lds	Linker description
-
-- common/cmd_bdinfo.c		Clock frequencies output
-- common/cmd_mii.c		mii support
-
-- arch/m68k/cpu/mcf5445x/cpu.c		cpu specific code
-- arch/m68k/cpu/mcf5445x/cpu_init.c	Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
-- arch/m68k/cpu/mcf5445x/interrupts.c	cpu specific interrupt support
-- arch/m68k/cpu/mcf5445x/speed.c		system, pci, flexbus, and cpu clock
-- arch/m68k/cpu/mcf5445x/Makefile		Makefile
-- arch/m68k/cpu/mcf5445x/config.mk	config make
-- arch/m68k/cpu/mcf5445x/start.S		start up assembly code
-
-- board/freescale/m54455evb/README	This readme file
-
-- drivers/net/mcffec.c		ColdFire common FEC driver
-- drivers/serial/mcfuart.c	ColdFire common UART driver
-
-- include/asm-m68k/bitops.h		Bit operation function export
-- include/asm-m68k/byteorder.h		Byte order functions
-- include/asm-m68k/fec.h		FEC structure and definition
-- include/asm-m68k/fsl_i2c.h		I2C structure and definition
-- include/asm-m68k/global_data.h	Global data structure
-- include/asm-m68k/immap.h		ColdFire specific header file and driver macros
-- include/asm-m68k/immap_5445x.h	mcf5445x specific header file
-- include/asm-m68k/io.h			io functions
-- include/asm-m68k/m5445x.h		mcf5445x specific header file
-- include/asm-m68k/posix_types.h	Posix
-- include/asm-m68k/processor.h		header file
-- include/asm-m68k/ptrace.h		Exception structure
-- include/asm-m68k/rtc.h		Realtime clock header file
-- include/asm-m68k/string.h		String function export
-- include/asm-m68k/timer.h		Timer structure and definition
-- include/asm-m68k/types.h		Data types definition
-- include/asm-m68k/uart.h		Uart structure and definition
-- include/asm-m68k/u-boot.h		U-Boot structure
-
-- include/configs/M54455EVB.h	Board specific configuration file
-
-- arch/m68k/lib/board.c			board init function
-- arch/m68k/lib/cache.c
-- arch/m68k/lib/interrupts			Coldfire common interrupt functions
-- arch/m68k/lib/m68k_linux.c
-- arch/m68k/lib/time.c			Timer functions (Dma timer and PIT)
-- arch/m68k/lib/traps.c			Exception init code
-
-- rtc/mcfrtc.c				Realtime clock Driver
-
-1 MCF5445x specific Options/Settings
-====================================
-1.1 pre-loader is no longer suppoer in thie coldfire family
-
-1.2 Configuration settings for M54455EVB Development Board
-CONFIG_MCF5445x		-- define for all MCF5445x CPUs
-CONFIG_M54455		-- define for all Freescale MCF54455 CPUs
-CONFIG_M54455EVB	-- define for M54455EVB board
-
-CONFIG_MCFUART		-- define to use common CF Uart driver
-CONFIG_SYS_UART_PORT		-- define UART port number, start with 0, 1 and 2
-CONFIG_BAUDRATE		-- define UART baudrate
-
-CONFIG_MCFRTC		-- define to use common CF RTC driver
-CONFIG_SYS_MCFRTC_BASE		-- provide base address for RTC in immap.h
-CONFIG_SYS_RTC_OSCILLATOR	-- define RTC clock frequency
-RTC_DEBUG		-- define to show RTC debug message
-CONFIG_CMD_DATE		-- enable to use date feature in U-Boot
-
-CONFIG_MCFFEC		-- define to use common CF FEC driver
-CONFIG_MII		-- enable to use MII driver
-CONFIG_CF_DOMII		-- enable to use MII feature in cmd_mii.c
-CONFIG_SYS_DISCOVER_PHY	-- enable PHY discovery
-CONFIG_SYS_RX_ETH_BUFFER	-- Set FEC Receive buffer
-CONFIG_SYS_FAULT_ECHO_LINK_DOWN--
-CONFIG_SYS_FEC0_PINMUX		-- Set FEC0 Pin configuration
-CONFIG_SYS_FEC1_PINMUX		-- Set FEC1 Pin configuration
-CONFIG_SYS_FEC0_MIIBASE	-- Set FEC0 MII base register
-CONFIG_SYS_FEC1_MIIBASE	-- Set FEC0 MII base register
-MCFFEC_TOUT_LOOP	-- set FEC timeout loop
-CONFIG_HAS_ETH1		-- define to enable second FEC in U-Boot
-
-CONFIG_ISO_PARTITION	-- enable ISO read/write
-CONFIG_DOS_PARTITION	-- enable DOS read/write
-CONFIG_IDE_RESET	-- define ide_reset()
-CONFIG_IDE_PREINIT	-- define ide_preinit()
-CONFIG_ATAPI		-- define ATAPI support
-CONFIG_LBA48		-- define LBA48 (larger than 120GB) support
-CONFIG_SYS_IDE_MAXBUS		-- define max channel
-CONFIG_SYS_IDE_MAXDEVICE	-- define max devices per channel
-CONFIG_SYS_ATA_BASE_ADDR	-- define ATA base address
-CONFIG_SYS_ATA_IDE0_OFFSET	-- define ATA IDE0 offset
-CONFIG_SYS_ATA_DATA_OFFSET	-- define ATA data IO
-CONFIG_SYS_ATA_REG_OFFSET	-- define for normal register accesses
-CONFIG_SYS_ATA_ALT_OFFSET	-- define for alternate registers
-CONFIG_SYS_ATA_STRIDE		-- define for Interval between registers
-_IO_BASE		-- define for IO base address
-
-CONFIG_MCFTMR		-- define to use DMA timer
-
-CONFIG_SYS_FSL_I2C	-- define to use FSL common I2C driver
-CONFIG_SYS_I2C_SOFT	-- define for I2C bit-banged
-CONFIG_SYS_I2C_SPEED		-- define for I2C speed
-CONFIG_SYS_I2C_SLAVE		-- define for I2C slave address
-CONFIG_SYS_I2C_OFFSET		-- define for I2C base address offset
-CONFIG_SYS_IMMR		-- define for MBAR offset
-
-CONFIG_PCI              -- define for PCI support
-CONFIG_PCI_PNP          -- define for Plug n play support
-CONFIG_SYS_PCI_MEM_BUS		-- PCI memory logical offset
-CONFIG_SYS_PCI_MEM_PHYS	-- PCI memory physical offset
-CONFIG_SYS_PCI_MEM_SIZE	-- PCI memory size
-CONFIG_SYS_PCI_IO_BUS		-- PCI IO logical offset
-CONFIG_SYS_PCI_IO_PHYS		-- PCI IO physical offset
-CONFIG_SYS_PCI_IO_SIZE		-- PCI IO size
-CONFIG_SYS_PCI_CFG_BUS		-- PCI Configuration logical offset
-CONFIG_SYS_PCI_CFG_PHYS	-- PCI Configuration physical offset
-CONFIG_SYS_PCI_CFG_SIZE	-- PCI Configuration size
-
-CONFIG_EXTRA_CLOCK	-- Enable extra clock such as vco, flexbus, pci, etc
-
-CONFIG_SYS_MBAR		-- define MBAR offset
-
-CONFIG_SYS_ATMEL_BOOT		-- To determine the U-Boot is booted from Atmel or Intel
-
-CONFIG_MONITOR_IS_IN_RAM -- Not support
-
-CONFIG_SYS_INIT_RAM_ADDR	-- defines the base address of the MCF54455 internal SRAM
-
-CONFIG_SYS_CSn_BASE	-- defines the Chip Select Base register
-CONFIG_SYS_CSn_MASK	-- defines the Chip Select Mask register
-CONFIG_SYS_CSn_CTRL	-- defines the Chip Select Control register
-
-CONFIG_SYS_ATMEL_BASE	-- defines the Atmel Flash base
-CONFIG_SYS_INTEL_BASE	-- defines the Intel Flash base
-
-CONFIG_SYS_SDRAM_BASE	-- defines the DRAM Base
-CONFIG_SYS_SDRAM_BASE1	-- defines the DRAM Base 1
-
-2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL
-===========================================
-2.1. System memory map:
-	Flash:		0x00000000-0x3FFFFFFF (1024MB)
-	DDR:		0x40000000-0x7FFFFFFF (1024MB)
-	SRAM:		0x80000000-0x8FFFFFFF (256MB)
-	ATA:		0x90000000-0x9FFFFFFF (256MB)
-	PCI:		0xA0000000-0xBFFFFFFF (512MB)
-	FlexBus:	0xC0000000-0xDFFFFFFF (512MB)
-	IP:		0xF0000000-0xFFFFFFFF (256MB)
-
-2.2. For the initial bringup, we adopted a consistent memory scheme between U-Boot and
-	linux kernel, you can customize it based on your system requirements:
-	Atmel boot:
-	Flash0:		0x00000000-0x0007FFFF (512KB)
-	Flash1:		0x04000000-0x05FFFFFF (32MB)
-	Intel boot:
-	Flash0:		0x00000000-0x01FFFFFF (32MB)
-	Flash1:		0x04000000-0x0407FFFF (512KB)
-
-	CPLD:		0x08000000-0x08FFFFFF (16MB)
-	FPGA:		0x09000000-0x09FFFFFF (16MB)
-	DDR:		0x40000000-0x4FFFFFFF (256MB)
-	SRAM:		0x80000000-0x80007FFF (32KB)
-	IP:		0xFC000000-0xFC0FFFFF (64KB)
-
-3. SWITCH SETTINGS
-==================
-3.1 SW1 Pin3: 0 - Boot from Atmel or 1 - INTEL
-	SW1 Pin4: 0 - ULPI chip not in reset state or 1 - ULPI chip in reset state
-	SW1 Pin5: 0 - Full ATA Bus enabled, FEC Phy1 powered down
-			  1 - Upper 8 bits ATA data bus disabled, FEC PHY1 active
-	SW1 Pin6: 0 - FEC Phy0 active or 1 - FEC Phy0 powered down
-	SW1 Pin3: 0 - Boot from Atmel or 1 - INTEL
-
-4. COMPILATION
-==============
-4.1	To create U-Boot the gcc-4.1-32 compiler set (ColdFire ELF version)
-from codesourcery.com was used. Download it from:
-http://www.codesourcery.com/gnu_toolchains/coldfire/download.html
-
-4.2 Compilation
-   export CROSS_COMPILE=cross-compile-prefix
-   cd u-boot-1.x.x
-   make distclean
-   make M54455EVB_config, or		- default to atmel 33Mhz input clock
-   make M54455EVB_atmel_config, or	- default to atmel 33Mhz input clock
-   make M54455EVB_a33_config, or	- default to atmel 33Mhz input clock
-   make M54455EVB_a66_config, or	- default to atmel 66Mhz input clock
-   make M54455EVB_intel_config, or	- default to intel 33Mhz input clock
-   make M54455EVB_i33_config, or	- default to intel 33Mhz input clock
-   make M54455EVB_i66_config, or	- default to intel 66Mhz input clock
-   make
-
-5. SCREEN DUMP
-==============
-5.1 M54455EVB Development board
-    Boot from Atmel (NOTE: May not show exactly the same)
-
-U-Boot 1.2.0-g98c80b46-dirty (Jul 26 2007 - 12:44:08)
-
-CPU:   Freescale MCF54455 (Mask:48 Version:1)
-       CPU CLK 266 Mhz BUS CLK 133 Mhz FLB CLK 66 Mhz
-       PCI CLK 33 Mhz INP CLK 33 Mhz VCO CLK 533 Mhz
-Board: Freescale M54455 EVB
-I2C:   ready
-DRAM:  256 MB
-FLASH: 16.5 MB
-In:    serial
-Out:   serial
-Err:   serial
-Net:   FEC0, FEC1
-IDE:   Bus 0: not available
--> print
-bootargs=root=/dev/ram rw
-bootdelay=1
-baudrate=115200
-ethaddr=00:e0:0c:bc:e5:60
-eth1addr=00:e0:0c:bc:e5:61
-hostname=M54455EVB
-netdev=eth0
-inpclk=33333333
-loadaddr=40010000
-load=tftp ${loadaddr) ${u-boot}
-upd=run load; run prog
-prog=prot off 0 2ffff;era 0 2ffff;cp.b ${loadaddr} 0 ${filesize};save
-ethact=FEC0
-mtdids=nor0=M54455EVB-1
-mtdparts=M54455EVB-1:16m(user)
-u-boot=u-boot54455.bin
-filesize=292b4
-fileaddr=40010000
-gatewayip=192.168.1.1
-netmask=255.255.255.0
-ipaddr=192.168.1.3
-serverip=192.168.1.2
-stdin=serial
-stdout=serial
-stderr=serial
-mem=261632k
-
-Environment size: 563/8188 bytes
--> bdinfo
-memstart    = 0x40000000
-memsize     = 0x10000000
-flashstart  = 0x00000000
-flashsize   = 0x01080000
-flashoffset = 0x00000000
-sramstart   = 0x80000000
-sramsize    = 0x00008000
-mbar        = 0xFC000000
-busfreq     = 133.333 MHz
-pcifreq     = 33.333 MHz
-flbfreq     = 66.666 MHz
-inpfreq     = 33.333 MHz
-vcofreq     = 533.333 MHz
-ethaddr     = 00:E0:0C:BC:E5:60
-eth1addr    = 00:E0:0C:BC:E5:61
-ip_addr     = 192.168.1.3
-baudrate    = 115200 bps
-->
--> help
-?       - alias for 'help'
-base    - print or set address offset
-bdinfo  - print Board Info structure
-boot    - boot default, i.e., run 'bootcmd'
-bootd   - boot default, i.e., run 'bootcmd'
-bootelf - Boot from an ELF image in memory
-bootm   - boot application image from memory
-bootp	- boot image via network using BootP/TFTP protocol
-bootvx  - Boot vxWorks from an ELF image
-cmp     - memory compare
-coninfo - print console devices and information
-cp      - memory copy
-crc32   - checksum calculation
-date    - get/set/reset date & time
-dcache  - enable or disable data cache
-diskboot- boot from IDE device
-echo    - echo args to console
-erase   - erase FLASH memory
-ext2load- load binary file from a Ext2 filesystem
-ext2ls  - list files in a directory (default /)
-fatinfo - print information about filesystem
-fatload - load binary file from a dos filesystem
-fatls   - list files in a directory (default /)
-flinfo  - print FLASH memory information
-fsinfo	- print information about filesystems
-fsload	- load binary file from a filesystem image
-go      - start application at address 'addr'
-help    - print online help
-i2c     - I2C sub-system
-icache  - enable or disable instruction cache
-ide     - IDE sub-system
-iminfo  - print header information for application image
-imls    - list all images found in flash
-itest	- return true/false on integer compare
-loadb   - load binary file over serial line (kermit mode)
-loads   - load S-Record file over serial line
-loady   - load binary file over serial line (ymodem mode)
-loop    - infinite loop on address range
-ls	- list files in a directory (default /)
-md      - memory display
-mii     - MII utility commands
-mm      - memory modify (auto-incrementing)
-mtest   - simple RAM test
-mw      - memory write (fill)
-nfs	- boot image via network using NFS protocol
-nm      - memory modify (constant address)
-pci     - list and access PCI Configuration Space
-ping	- send ICMP ECHO_REQUEST to network host
-printenv- print environment variables
-protect - enable or disable FLASH write protection
-rarpboot- boot image via network using RARP/TFTP protocol
-reset   - Perform RESET of the CPU
-run     - run commands in an environment variable
-saveenv - save environment variables to persistent storage
-setenv  - set environment variables
-sleep   - delay execution for some time
-source  - run script from memory
-tftpboot- boot image via network using TFTP protocol
-version - print monitor version
-->bootm 4000000
-
-## Booting image at 04000000 ...
-   Image Name:   Linux Kernel Image
-   Created:      2007-08-14  15:13:00 UTC
-   Image Type:   M68K Linux Kernel Image (uncompressed)
-   Data Size:    2301952 Bytes =  2.2 MB
-   Load Address: 40020000
-   Entry Point:  40020000
-   Verifying Checksum ... OK
-OK
-Linux version 2.6.20-gfe5136d6-dirty (mattw@kea) (gcc version 4.2.0 20070318 (pr
-erelease) (Sourcery G++ Lite 4.2-20)) #108 Mon Aug 13 13:00:13 MDT 2007
-starting up linux startmem 0xc0254000, endmem 0xcfffffff, size 253MB
-Built 1 zonelists.  Total pages: 32624
-Kernel command line: root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=ph
-ysmap-flash.0:5M(kernel)ro,-(jffs2)
-PID hash table entries: 1024 (order: 10, 4096 bytes)
-Console: colour dummy device 80x25
-Dentry cache hash table entries: 32768 (order: 4, 131072 bytes)
-Inode-cache hash table entries: 16384 (order: 3, 65536 bytes)
-Memory: 257496k/262136k available (1864k kernel code, 2440k data, 88k init)
-Mount-cache hash table entries: 1024
-NET: Registered protocol family 16
-SCSI subsystem initialized
-NET: Registered protocol family 2
-IP route cache hash table entries: 2048 (order: 0, 8192 bytes)
-TCP established hash table entries: 8192 (order: 2, 32768 bytes)
-TCP bind hash table entries: 4096 (order: 1, 16384 bytes)
-TCP: Hash tables configured (established 8192 bind 4096)
-TCP reno registered
-JFFS2 version 2.2. (NAND) (C) 2001-2006 Red Hat, Inc.
-io scheduler noop registered
-io scheduler anticipatory registered
-io scheduler deadline registered
-io scheduler cfq registered (default)
-ColdFire internal UART serial driver version 1.00
-ttyS0 at 0xfc060000 (irq = 90) is a builtin ColdFire UART
-ttyS1 at 0xfc064000 (irq = 91) is a builtin ColdFire UART
-ttyS2 at 0xfc068000 (irq = 92) is a builtin ColdFire UART
-RAMDISK driver initialized: 16 RAM disks of 64000K size 1024 blocksize
-loop: loaded (max 8 devices)
-FEC ENET Version 0.2
-fec: PHY @ 0x0, ID 0x20005ca2 -- DP83849
-eth0: ethernet 00:08:ee:00:e4:19
-physmap platform flash device: 01000000 at 04000000
-physmap-flash.0: Found 1 x16 devices at 0x0 in 8-bit bank
- Intel/Sharp Extended Query Table at 0x0031
-Using buffer write method
-cfi_cmdset_0001: Erase suspend on write enabled
-2 cmdlinepart partitions found on MTD device physmap-flash.0
-Creating 2 MTD partitions on "physmap-flash.0":
-0x00000000-0x00500000 : "kernel"
-mtd: Giving out device 0 to kernel
-0x00500000-0x01000000 : "jffs2"
-mtd: Giving out device 1 to jffs2
-mice: PS/2 mouse device common for all mice
-i2c /dev entries driver
-TCP cubic registered
-NET: Registered protocol family 1
-NET: Registered protocol family 17
-NET: Registered protocol family 15
-VFS: Mounted root (jffs2 filesystem).
-Setting the hostname to freescale
-Mounting filesystems
-mount: Mounting usbfs on /proc/bus/usb failed: No such file or directory
-Starting syslogd and klogd
-Setting up networking on loopback device:
-Setting up networking on eth0:
-eth0: config: auto-negotiation on, 100FDX, 100HDX, 10FDX, 10HDX.
-Adding static route for default gateway to 172.27.255.254:
-Setting nameserver to 172.27.0.1 in /etc/resolv.conf:
-Starting inetd:
-/ #
diff --git a/board/freescale/m54455evb/m54455evb.c b/board/freescale/m54455evb/m54455evb.c
deleted file mode 100644
index c749ee407e..0000000000
--- a/board/freescale/m54455evb/m54455evb.c
+++ /dev/null
@@ -1,217 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- */
-
-#include <common.h>
-#include <init.h>
-#include <pci.h>
-#include <asm/global_data.h>
-#include <asm/immap.h>
-#include <asm/io.h>
-#include <linux/delay.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int checkboard(void)
-{
-	puts("Board: ");
-	puts("Freescale M54455 EVB\n");
-	return 0;
-};
-
-int dram_init(void)
-{
-	u32 dramsize;
-#ifdef CONFIG_CF_SBF
-	/*
-	 * Serial Boot: The dram is already initialized in start.S
-	 * only require to return DRAM size
-	 */
-	dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000 >> 1;
-#else
-	sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
-	gpio_t *gpio = (gpio_t *)(MMAP_GPIO);
-	u32 i;
-
-	dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000 >> 1;
-
-	for (i = 0x13; i < 0x20; i++) {
-		if (dramsize == (1 << i))
-			break;
-	}
-	i--;
-
-	out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH);
-
-	out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i);
-	out_be32(&sdram->sdcs1, CONFIG_SYS_SDRAM_BASE1 | i);
-
-	out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1);
-	out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2);
-
-	/* Issue PALL */
-	out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
-
-	/* Issue LEMR */
-	out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_EMOD | 0x408);
-	out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE | 0x300);
-
-	udelay(500);
-
-	/* Issue PALL */
-	out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
-
-	/* Perform two refresh cycles */
-	out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
-	out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
-
-	out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE | 0x200);
-
-	out_be32(&sdram->sdcr,
-		(CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
-
-	udelay(100);
-#endif
-	gd->ram_size = dramsize << 1;
-
-	return 0;
-};
-
-int testdram(void)
-{
-	/* TODO: XXX XXX XXX */
-	printf("DRAM test not implemented!\n");
-
-	return (0);
-}
-
-#if defined(CONFIG_IDE)
-#include <ata.h>
-
-int ide_preinit(void)
-{
-	gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-	u32 tmp;
-
-	tmp = (in_8(&gpio->par_fec) & GPIO_PAR_FEC_FEC1_UNMASK) | 0x10;
-	setbits_8(&gpio->par_fec, tmp);
-	tmp = ((in_be16(&gpio->par_feci2c) & 0xf0ff) |
-		(GPIO_PAR_FECI2C_MDC1_ATA_DIOR | GPIO_PAR_FECI2C_MDIO1_ATA_DIOW));
-	setbits_be16(&gpio->par_feci2c, tmp);
-
-	setbits_be16(&gpio->par_ata,
-		GPIO_PAR_ATA_BUFEN | GPIO_PAR_ATA_CS1 | GPIO_PAR_ATA_CS0 |
-		GPIO_PAR_ATA_DA2 | GPIO_PAR_ATA_DA1 | GPIO_PAR_ATA_DA0 |
-		GPIO_PAR_ATA_RESET_RESET | GPIO_PAR_ATA_DMARQ_DMARQ |
-		GPIO_PAR_ATA_IORDY_IORDY);
-	setbits_be16(&gpio->par_pci,
-		GPIO_PAR_PCI_GNT3_ATA_DMACK | GPIO_PAR_PCI_REQ3_ATA_INTRQ);
-
-	return (0);
-}
-
-void ide_set_reset(int idereset)
-{
-	atac_t *ata = (atac_t *) MMAP_ATA;
-	long period;
-	/*  t1,  t2,  t3,  t4,  t5,  t6,  t9, tRD,  tA */
-	int piotms[5][9] = {
-		{70, 165, 60, 30, 50, 5, 20, 0, 35},	/* PIO 0 */
-		{50, 125, 45, 20, 35, 5, 15, 0, 35},	/* PIO 1 */
-		{30, 100, 30, 15, 20, 5, 10, 0, 35},	/* PIO 2 */
-		{30, 80, 30, 10, 20, 5, 10, 0, 35},	/* PIO 3 */
-		{25, 70, 20, 10, 20, 5, 10, 0, 35}
-	};			/* PIO 4 */
-
-	if (idereset) {
-		/* control reset */
-		out_8(&ata->cr, 0);
-		udelay(10000);
-	} else {
-#define CALC_TIMING(t) (t + period - 1) / period
-		period = 1000000000 / gd->bus_clk;	/* period in ns */
-
-		/*ata->ton = CALC_TIMING (180); */
-		out_8(&ata->t1, CALC_TIMING(piotms[2][0]));
-		out_8(&ata->t2w, CALC_TIMING(piotms[2][1]));
-		out_8(&ata->t2r, CALC_TIMING(piotms[2][1]));
-		out_8(&ata->ta, CALC_TIMING(piotms[2][8]));
-		out_8(&ata->trd, CALC_TIMING(piotms[2][7]));
-		out_8(&ata->t4, CALC_TIMING(piotms[2][3]));
-		out_8(&ata->t9, CALC_TIMING(piotms[2][6]));
-
-		/* IORDY enable */
-		out_8(&ata->cr, 0x40);
-		udelay(200000);
-		/* IORDY enable */
-		setbits_8(&ata->cr, 0x01);
-	}
-}
-#endif
-
-#if defined(CONFIG_PCI)
-/*
- * Initialize PCI devices, report devices found.
- */
-static struct pci_controller hose;
-extern void pci_mcf5445x_init(struct pci_controller *hose);
-
-void pci_init_board(void)
-{
-	pci_mcf5445x_init(&hose);
-}
-#endif				/* CONFIG_PCI */
-
-#if defined(CONFIG_FLASH_CFI_LEGACY)
-#include <flash.h>
-ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
-{
-	int sect[] = CONFIG_SYS_ATMEL_SECT;
-	int sectsz[] = CONFIG_SYS_ATMEL_SECTSZ;
-	int i, j, k;
-
-	if (base != CONFIG_SYS_ATMEL_BASE)
-		return 0;
-
-	info->flash_id          = 0x01000000;
-	info->portwidth         = 1;
-	info->chipwidth         = 1;
-	info->buffer_size       = 1;
-	info->erase_blk_tout    = 16384;
-	info->write_tout        = 2;
-	info->buffer_write_tout = 5;
-	info->vendor            = 0xFFF0; /* CFI_CMDSET_AMD_LEGACY */
-	info->cmd_reset         = 0x00F0;
-	info->interface         = FLASH_CFI_X8;
-	info->legacy_unlock     = 0;
-	info->manufacturer_id   = (u16) ATM_MANUFACT;
-	info->device_id         = ATM_ID_LV040;
-	info->device_id2        = 0;
-
-	info->ext_addr          = 0;
-	info->cfi_version       = 0x3133;
-	info->cfi_offset        = 0x0000;
-	info->addr_unlock1      = 0x00000555;
-	info->addr_unlock2      = 0x000002AA;
-	info->name              = "CFI conformant";
-
-	info->size              = 0;
-	info->sector_count      = CONFIG_SYS_ATMEL_TOTALSECT;
-	info->start[0] = base;
-	for (k = 0, i = 0; i < CONFIG_SYS_ATMEL_REGION; i++) {
-		info->size += sect[i] * sectsz[i];
-
-		for (j = 0; j < sect[i]; j++, k++) {
-			info->start[k + 1] = info->start[k] + sectsz[i];
-			info->protect[k] = 0;
-		}
-	}
-
-	return 1;
-}
-#endif				/* CONFIG_SYS_FLASH_CFI */
diff --git a/board/freescale/m54455evb/sbf_dram_init.S b/board/freescale/m54455evb/sbf_dram_init.S
deleted file mode 100644
index fe5bb05ddc..0000000000
--- a/board/freescale/m54455evb/sbf_dram_init.S
+++ /dev/null
@@ -1,100 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Board-specific sbf ddr/sdram init.
- *
- * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
- */
-
- #include <config.h>
-
-.global sbf_dram_init
-.text
-
-sbf_dram_init:
-	/* Dram Initialization a1, a2, and d0 */
-	/* mscr sdram */
-	move.l	#0xFC0A4074, %a1
-	move.b	#(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
-	nop
-
-	/* SDRAM Chip 0 and 1 */
-	move.l	#0xFC0B8110, %a1
-	move.l	#0xFC0B8114, %a2
-
-	/* calculate the size */
-	move.l	#0x13, %d1
-	move.l	#(CONFIG_SYS_SDRAM_SIZE), %d2
-#ifdef CONFIG_SYS_SDRAM_BASE1
-	lsr.l	#1, %d2
-#endif
-
-dramsz_loop:
-	lsr.l	#1, %d2
-	add.l	#1, %d1
-	cmp.l	#1, %d2
-	bne	dramsz_loop
-#ifdef CONFIG_SYS_NAND_BOOT
-	beq	asm_nand_chk_status
-#endif
-	/* SDRAM Chip 0 and 1 */
-	move.l	#(CONFIG_SYS_SDRAM_BASE), (%a1)
-	or.l	%d1, (%a1)
-#ifdef CONFIG_SYS_SDRAM_BASE1
-	move.l	#(CONFIG_SYS_SDRAM_BASE1), (%a2)
-	or.l	%d1, (%a2)
-#endif
-	nop
-
-	/* dram cfg1 and cfg2 */
-	move.l	#0xFC0B8008, %a1
-	move.l	#(CONFIG_SYS_SDRAM_CFG1), (%a1)
-	nop
-	move.l	#0xFC0B800C, %a2
-	move.l	#(CONFIG_SYS_SDRAM_CFG2), (%a2)
-	nop
-
-	move.l	#0xFC0B8000, %a1	/* Mode */
-	move.l	#0xFC0B8004, %a2	/* Ctrl */
-
-	/* Issue PALL */
-	move.l	#(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
-	nop
-
-	/* Issue LEMR */
-	move.l	#(CONFIG_SYS_SDRAM_EMOD + 0x408), (%a1)
-	nop
-	move.l	#(CONFIG_SYS_SDRAM_MODE + 0x300), (%a1)
-	nop
-
-	move.l	#1000, %d1
-	bsr	asm_delay
-
-	/* Issue PALL */
-	move.l	#(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
-	nop
-
-	/* Perform two refresh cycles */
-	move.l	#(CONFIG_SYS_SDRAM_CTRL + 4), %d0
-	nop
-	move.l	%d0, (%a2)
-	move.l	%d0, (%a2)
-	nop
-
-	move.l	#(CONFIG_SYS_SDRAM_MODE + 0x200), (%a1)
-	nop
-
-	move.l	#500, %d1
-	bsr	asm_delay
-
-	move.l	#(CONFIG_SYS_SDRAM_CTRL), %d1
-	and.l	#0x7FFFFFFF, %d1
-
-	or.l	#0x10000C00, %d1
-
-	move.l	%d1, (%a2)
-	nop
-
-	move.l	#2000, %d1
-	bsr	asm_delay
-
-	rts