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authorTom Rini <trini@konsulko.com>2015-05-05 10:32:08 -0400
committerTom Rini <trini@konsulko.com>2015-05-05 10:32:08 -0400
commit1131d4e22cf8f13d0dabaad7f1b84d9baffdfbd6 (patch)
tree89f46db2de98f59883ba6e4390f91af1599e9956 /board
parentff7e9cfc338ecd6db5ed7d6ff8fb7a2889b0131c (diff)
parent2083db7a75792d317a8e726e8be72abea8941d03 (diff)
Merge git://git.denx.de/u-boot-marvell
Diffstat (limited to 'board')
-rw-r--r--board/Marvell/db-88f6820-gp/Kconfig15
-rw-r--r--board/Marvell/db-88f6820-gp/Makefile7
-rw-r--r--board/Marvell/db-88f6820-gp/binary.016
-rw-r--r--board/Marvell/db-88f6820-gp/db-88f6820-gp.c103
-rw-r--r--board/Marvell/db-88f6820-gp/kwbimage.cfg12
-rw-r--r--board/Marvell/db-mv784mp-gp/Kconfig2
-rw-r--r--board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c3
-rw-r--r--board/maxbcm/Kconfig2
-rw-r--r--board/maxbcm/maxbcm.c2
9 files changed, 158 insertions, 4 deletions
diff --git a/board/Marvell/db-88f6820-gp/Kconfig b/board/Marvell/db-88f6820-gp/Kconfig
new file mode 100644
index 00000000000..b2e911512b9
--- /dev/null
+++ b/board/Marvell/db-88f6820-gp/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_DB_88F6820_GP
+
+config SYS_BOARD
+ default "db-88f6820-gp"
+
+config SYS_VENDOR
+ default "Marvell"
+
+config SYS_SOC
+ default "mvebu"
+
+config SYS_CONFIG_NAME
+ default "db-88f6820-gp"
+
+endif
diff --git a/board/Marvell/db-88f6820-gp/Makefile b/board/Marvell/db-88f6820-gp/Makefile
new file mode 100644
index 00000000000..58d40dd6cc6
--- /dev/null
+++ b/board/Marvell/db-88f6820-gp/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2015 Stefan Roese <sr@denx.de>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := db-88f6820-gp.o
diff --git a/board/Marvell/db-88f6820-gp/binary.0 b/board/Marvell/db-88f6820-gp/binary.0
new file mode 100644
index 00000000000..57a4cbf3304
--- /dev/null
+++ b/board/Marvell/db-88f6820-gp/binary.0
@@ -0,0 +1,16 @@
+--------
+WARNING:
+--------
+This file should contain the bin_hdr generated by the original Marvell
+U-Boot implementation. As this is currently not included in this
+U-Boot version, we have added this placeholder, so that the U-Boot
+image can be generated without errors.
+
+If you have a known to be working bin_hdr for your board, then you
+just need to replace this text file here with the binary header
+and recompile U-Boot.
+
+In a few weeks, mainline U-Boot will get support to generate the
+bin_hdr with the DDR training code itself. By implementing this code
+as SPL U-Boot. Then this file will not be needed any more and will
+get removed.
diff --git a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
new file mode 100644
index 00000000000..51ac495a448
--- /dev/null
+++ b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
@@ -0,0 +1,103 @@
+/*
+ * Copyright (C) 2015 Stefan Roese <sr@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <miiphy.h>
+#include <asm/io.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/soc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BIT(nr) (1UL << (nr))
+
+#define ETH_PHY_CTRL_REG 0
+#define ETH_PHY_CTRL_POWER_DOWN_BIT 11
+#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT)
+
+/*
+ * Those values and defines are taken from the Marvell U-Boot version
+ * "u-boot-2013.01-2014_T3.0"
+ */
+#define DB_GP_88F68XX_GPP_OUT_ENA_LOW \
+ (~(BIT(1) | BIT(4) | BIT(6) | BIT(7) | BIT(8) | BIT(9) | \
+ BIT(10) | BIT(11) | BIT(19) | BIT(22) | BIT(23) | BIT(25) | \
+ BIT(26) | BIT(27) | BIT(29) | BIT(30) | BIT(31)))
+#define DB_GP_88F68XX_GPP_OUT_ENA_MID \
+ (~(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(15) | \
+ BIT(16) | BIT(17) | BIT(18)))
+
+#define DB_GP_88F68XX_GPP_OUT_VAL_LOW 0x0
+#define DB_GP_88F68XX_GPP_OUT_VAL_MID 0x0
+#define DB_GP_88F68XX_GPP_POL_LOW 0x0
+#define DB_GP_88F68XX_GPP_POL_MID 0x0
+
+/* IO expander on Marvell GP board includes e.g. fan enabling */
+struct marvell_io_exp {
+ u8 chip;
+ u8 addr;
+ u8 val;
+};
+
+static struct marvell_io_exp io_exp[] = {
+ { 0x20, 6, 0x20 }, /* Configuration registers: Bit on --> Input bits */
+ { 0x20, 7, 0xC3 }, /* Configuration registers: Bit on --> Input bits */
+ { 0x20, 2, 0x1D }, /* Output Data, register#0 */
+ { 0x20, 3, 0x18 }, /* Output Data, register#1 */
+ { 0x21, 6, 0xC3 }, /* Configuration registers: Bit on --> Input bits */
+ { 0x21, 7, 0x31 }, /* Configuration registers: Bit on --> Input bits */
+ { 0x21, 2, 0x08 }, /* Output Data, register#0 */
+ { 0x21, 3, 0xC0 } /* Output Data, register#1 */
+};
+
+int board_early_init_f(void)
+{
+ /* Configure MPP */
+ writel(0x11111111, MVEBU_MPP_BASE + 0x00);
+ writel(0x11111111, MVEBU_MPP_BASE + 0x04);
+ writel(0x11244011, MVEBU_MPP_BASE + 0x08);
+ writel(0x22222111, MVEBU_MPP_BASE + 0x0c);
+ writel(0x22200002, MVEBU_MPP_BASE + 0x10);
+ writel(0x30042022, MVEBU_MPP_BASE + 0x14);
+ writel(0x55550555, MVEBU_MPP_BASE + 0x18);
+ writel(0x00005550, MVEBU_MPP_BASE + 0x1c);
+
+ /* Set GPP Out value */
+ writel(DB_GP_88F68XX_GPP_OUT_VAL_LOW, MVEBU_GPIO0_BASE + 0x00);
+ writel(DB_GP_88F68XX_GPP_OUT_VAL_MID, MVEBU_GPIO1_BASE + 0x00);
+
+ /* Set GPP Polarity */
+ writel(DB_GP_88F68XX_GPP_POL_LOW, MVEBU_GPIO0_BASE + 0x0c);
+ writel(DB_GP_88F68XX_GPP_POL_MID, MVEBU_GPIO1_BASE + 0x0c);
+
+ /* Set GPP Out Enable */
+ writel(DB_GP_88F68XX_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04);
+ writel(DB_GP_88F68XX_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04);
+
+ return 0;
+}
+
+int board_init(void)
+{
+ int i;
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
+
+ /* Init I2C IO expanders */
+ for (i = 0; i < ARRAY_SIZE(io_exp); i++)
+ i2c_write(io_exp[i].chip, io_exp[i].addr, 1, &io_exp[i].val, 1);
+
+ return 0;
+}
+
+int checkboard(void)
+{
+ puts("Board: Marvell DB-88F6820-GP\n");
+
+ return 0;
+}
diff --git a/board/Marvell/db-88f6820-gp/kwbimage.cfg b/board/Marvell/db-88f6820-gp/kwbimage.cfg
new file mode 100644
index 00000000000..e81245420fa
--- /dev/null
+++ b/board/Marvell/db-88f6820-gp/kwbimage.cfg
@@ -0,0 +1,12 @@
+#
+# Copyright (C) 2014 Stefan Roese <sr@denx.de>
+#
+
+# Armada XP uses version 1 image format
+VERSION 1
+
+# Boot Media configurations
+BOOT_FROM spi
+
+# Binary Header (bin_hdr) with DDR3 training code
+BINARY board/Marvell/db-88f6820-gp/binary.0 0000005b 00000068
diff --git a/board/Marvell/db-mv784mp-gp/Kconfig b/board/Marvell/db-mv784mp-gp/Kconfig
index 98aa10ade0b..d0b426e8d92 100644
--- a/board/Marvell/db-mv784mp-gp/Kconfig
+++ b/board/Marvell/db-mv784mp-gp/Kconfig
@@ -7,7 +7,7 @@ config SYS_VENDOR
default "Marvell"
config SYS_SOC
- default "armada-xp"
+ default "mvebu"
config SYS_CONFIG_NAME
default "db-mv784mp-gp"
diff --git a/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c
index b3dae8910d4..00ca878873d 100644
--- a/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c
+++ b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c
@@ -86,7 +86,8 @@ int checkboard(void)
/* Configure and enable MV88E1545 PHY */
void reset_phy(void)
{
- u16 devadr = CONFIG_PHY_BASE_ADDR;
+ u8 phy_addr[] = CONFIG_PHY_ADDR;
+ u16 devadr = phy_addr[0];
char *name = "neta0";
u16 reg;
diff --git a/board/maxbcm/Kconfig b/board/maxbcm/Kconfig
index d833ca0e251..e86aa16247c 100644
--- a/board/maxbcm/Kconfig
+++ b/board/maxbcm/Kconfig
@@ -4,7 +4,7 @@ config SYS_BOARD
default "maxbcm"
config SYS_SOC
- default "armada-xp"
+ default "mvebu"
config SYS_CONFIG_NAME
default "maxbcm"
diff --git a/board/maxbcm/maxbcm.c b/board/maxbcm/maxbcm.c
index 46b16ac29cc..2fbb90cfff1 100644
--- a/board/maxbcm/maxbcm.c
+++ b/board/maxbcm/maxbcm.c
@@ -12,7 +12,7 @@
#include <linux/mbus.h>
#include "../drivers/ddr/mvebu/ddr3_hw_training.h"
-#include "../arch/arm/mvebu-common/serdes/high_speed_env_spec.h"
+#include "../arch/arm/mach-mvebu/serdes/high_speed_env_spec.h"
DECLARE_GLOBAL_DATA_PTR;