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authorSimon Glass <sjg@chromium.org>2011-07-06 20:08:36 -0700
committerSimon Glass <sjg@chromium.org>2011-08-29 10:58:57 -0700
commit28b1652c96e58ebf4f4605a20ec74a6274ab75dc (patch)
tree369136746af421d265c121fe9b76430078c05e0a /board
parent1ad8c8f7c35c0c98a9e0984eb8cbbc51455d8a77 (diff)
fdt: Adjust flashmap to better align with correct bindings
The existing flashmap is not compatible with the way that Linux does flash maps. This changes it to fit better. It also works correctly with the new cros_bundle_firmware tool. We have two alternative maps for 2MB and 4MB images. BUG=chromium-os:17065 TEST=build and boot U-Boot on Seaboard Change-Id: I9fded46d15582e17122a3d40c4b71b7b6cc77174 Reviewed-on: http://gerrit.chromium.org/gerrit/3906 Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Diffstat (limited to 'board')
-rw-r--r--board/nvidia/seaboard/flashmap-2mb.dtsi120
-rw-r--r--board/nvidia/seaboard/flashmap-ro.dtsi (renamed from board/nvidia/seaboard/flashmap-twostop-ro-submap.dtsi)55
-rw-r--r--board/nvidia/seaboard/flashmap-twostop-2mb.dtsi124
-rw-r--r--board/nvidia/seaboard/flashmap-twostop-4mb.dtsi150
-rw-r--r--board/nvidia/seaboard/flashmap-twostop-seaboard.dtsi86
-rw-r--r--board/nvidia/seaboard/flashmap-twostop.dtsi100
-rw-r--r--board/nvidia/seaboard/onestop-layout.dtsi45
-rw-r--r--board/nvidia/seaboard/tegra2-aebl.dts2
-rw-r--r--board/nvidia/seaboard/tegra2-kaen.dts2
-rw-r--r--board/nvidia/seaboard/tegra2-seaboard.dts4
10 files changed, 316 insertions, 372 deletions
diff --git a/board/nvidia/seaboard/flashmap-2mb.dtsi b/board/nvidia/seaboard/flashmap-2mb.dtsi
deleted file mode 100644
index ab9ffb8f327..00000000000
--- a/board/nvidia/seaboard/flashmap-2mb.dtsi
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * This is the flash map for a 2MB device. It defines all the areas that
- * Chrome OS expects to find in its firmware device. The device is split into
- * a number of top-level sections, and within each are several areas.
- */
-
-/ {
- flash {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "chromeos,flashmap";
- reg = <0x00000000 0x00200000>;
-
- /* ---- Section: Read-only ---- */
- readonly {
- #address-cells = <1>;
- #size-cells = <1>;
-
- /*
- * This was 0xf0000 in the config file, but I have
- * moved vpd into the same section
- */
- reg = <0x00000000 0x00100000>;
- stub {
- reg = <0x00000000 0x00088000>;
- };
- recovery {
- reg = <0x00088000 0x00040000>;
- };
- data {
- reg = <0x000c8000 0x00008000>;
- };
- fmap {
- reg = <0x000c8000 0x00000400>;
- };
- fwid {
- reg = <0x000c8400 0x00000100>;
- };
- gbb {
- reg = <0x000d0000 0x00020000>;
- };
- vpd {
- reg = <0x000f0000 0x00010000>;
- };
- };
-
- /* ---- Section: Rewritable slot A ---- */
- readwrite-a {
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x00100000 0x00078000>;
- vblock {
- reg = <0x00100000 0x00010000>;
- };
- main {
- reg = <0x00110000 0x00067f00>;
- };
- fwid {
- reg = <0x00177f00 0x00000100>;
- };
- data {
- reg = <0x00100000 0x00000000>;
- };
- };
-
- /* ---- Section: Rewritable slot B ---- */
- readwrite-b {
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x00178000 0x00078000>;
- vblock {
- reg = <0x00178000 0x00010000>;
- };
- main {
- reg = <0x00188000 0x00067f00>;
- };
- fwid {
- reg = <0x001eff00 0x00000100>;
- };
- data {
- reg = <0x00178000 0x00000000>;
- };
- };
-
- /* ---- Section: Rewritable VPD ---- */
- readwrite-vpd {
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x001f0000 0x00008000>;
- vpd {
- reg = <0x001f0000 0x00008000>;
- };
- };
-
- /* ---- Section: Rewritable shared ---- */
- readwrite-shared {
- #address-cells = <1>;
- #size-cells = <1>;
- dev-cfg {
- reg = <0x001f8000 0x00004000>;
- };
- shared-data {
- reg = <0x001fc000 0x00002000>;
- };
- vbnv-context {
- reg = <0x001fe000 0x00001000>;
- };
- env {
- reg = <0x001ff000 0x00001000>;
- };
- };
- };
-
-};
diff --git a/board/nvidia/seaboard/flashmap-twostop-ro-submap.dtsi b/board/nvidia/seaboard/flashmap-ro.dtsi
index f8c943f16db..a7ce7dbd18f 100644
--- a/board/nvidia/seaboard/flashmap-twostop-ro-submap.dtsi
+++ b/board/nvidia/seaboard/flashmap-ro.dtsi
@@ -16,26 +16,45 @@
*/
/ {
+ chromeos-config {
+ twostop; /* Two-stop boot */
+ twostop-optional; /* One-stop optimization enabled */
+ textbase = <0xe08000>; /* Address where U-Boot loads */
+
+ /*
+ * Device and offset for second-stage firmware, in SPI for now
+ * second-stage = <&emmc 0x00000080 0>;
+ */
+ };
+
+ /*
+ * Labels have been selected to be to compatible with existing tools,
+ * even thought the terminology may be a little different on ARM.
+ * Names will be capitalized and hyphen converted to underscore by
+ * cros_bundle_firmware.
+ */
flash@0 {
- readonly@0 {
- label = "readonly";
- reg = <0x00000000 0x00100000>;
+ /* ---- Section: Read-only ---- */
+ ro-section@0 {
+ label = "ro-section";
+ reg = <0x00000000 0x000f0000>;
read-only;
};
- ro-firmware-image@0 {
- label = "ro-firmware-image";
+ ro-boot@0 {
+ label = "boot-stub";
reg = <0x00000000 0x000bfb00>; /* ~785 KB */
read-only;
type = "blob signed";
};
ro-firmware-id@bfb00 {
- label = "ro-onestop";
+ label = "ro-frid";
reg = <0x000bfb00 0x00000100>;
- read-only;
+ read-only;
+ type = "blobstring fwid";
};
- gbb@bfc00 {
+ ro-gbb@bfc00 {
label = "gbb";
reg = <0x000bfc00 0x00020000>;
read-only;
@@ -46,20 +65,22 @@
reg = <0x000dfc00 0x00010000>;
read-only;
};
- ro-vpd@efc00 {
- label = "ro-vpd";
- reg = <0x000efc00 0x00010000>;
- read-only;
- type = "wiped";
- wipe-value = [ff];
- };
- fmap@ffc00 {
+ ro-fmap@ffc00 {
label = "ro-fmap";
- reg = <0x000ffc00 0x00000400>;
+ reg = <0x000efc00 0x00000400>;
read-only;
type = "fmap";
ver-major = <1>;
ver-minor = <0>;
};
+
+ /* ---- Section: Vital-product data (VPD) ---- */
+ ro-vpd@efc00 {
+ label = "ro-vpd";
+ reg = <0x000f0000 0x00010000>;
+ read-only;
+ type = "wiped";
+ wipe-value = [ff];
+ };
};
};
diff --git a/board/nvidia/seaboard/flashmap-twostop-2mb.dtsi b/board/nvidia/seaboard/flashmap-twostop-2mb.dtsi
new file mode 100644
index 00000000000..2aa10455697
--- /dev/null
+++ b/board/nvidia/seaboard/flashmap-twostop-2mb.dtsi
@@ -0,0 +1,124 @@
+/*
+* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+* Use of this source code is governed by a BSD-style license that can be
+* found in the LICENSE file.
+*/
+
+/*
+* This is the flash map (fmap) for a twostop firmware. It defines all the areas
+* that Chrome OS expects to find in its firmware device. The device is split
+* into a number of top-level sections, and within each are several areas.
+*
+* Available flags for each entry are: read-only, compresed.
+* All sections will be marked static in the fmap.
+*/
+
+/include/ "flashmap-ro.dtsi"
+
+/ {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "winbond,W25Q16BVSSIG", "cfi-flash",
+ "chromeos,flashmap";
+ reg = <0x00000000 0x00200000>;
+
+ /* ---- Section: Rewritable slot A ---- */
+ rw-a@100000 {
+ label = "rw-section-a";
+ reg = <0x00100000 0x00078000>;
+ block-lba = <0x00000022>;
+ };
+ rw-a-boot@100000 {
+ label = "fw-main-a";
+ reg = <0x00100000 0x00076000>;
+ type = "blob boot";
+ };
+ rw-a-vblock@176000 {
+ label = "vblock-a";
+ reg = <0x00176000 0x00001f00>;
+ type = "keyblock boot";
+ keyblock = "dev_firmware.keyblock";
+ signprivate = "dev_firmware_data_key.vbprivk";
+ version = <1>;
+ kernelkey = "kernel_subkey.vbpubk";
+ preamble-flags = <1>;
+ };
+ rw-a-firmware-id@177f00 {
+ label = "rw-fwid-a";
+ reg = <0x00177f00 0x00000100>;
+ read-only;
+ type = "blobstring fwid";
+ };
+
+ /* ---- Section: Rewritable slot B ---- */
+ rw-b@178000 {
+ label = "rw-section-b";
+ reg = <0x00178000 0x00078000>;
+ block-lba = <0x00000422>;
+ };
+ rw-b-boot@178000 {
+ label = "fw-main-b";
+ reg = <0x00178000 0x00076000>;
+ type = "blob boot";
+ };
+ rw-b-vblock@1ee000 {
+ label = "vblock-b";
+ reg = <0x001ee000 0x00001f00>;
+ type = "keyblock boot";
+ keyblock = "firmware.keyblock";
+ signprivate = "firmware_data_key.vbprivk";
+ version = <1>;
+ kernelkey = "kernel_subkey.vbpubk";
+ preamble-flags = <1>;
+ };
+ rw-b-firmware-id@1eff00 {
+ label = "rw-fwid-a";
+ reg = <0x001eff00 0x00000100>;
+ read-only;
+ type = "blobstring fwid";
+ };
+
+ /* ---- Section: Rewritable VPD 32 KB ---- */
+ rw-vpd-section@1f0000 {
+ label = "rw-vpd-section";
+ reg = <0x001f0000 0x00008000>;
+ };
+ rw-vpd@1f0000 {
+ label = "rw-vpd";
+ reg = <0x001f0000 0x00008000>;
+ type = "wiped";
+ wipe-value = [ff];
+ };
+
+ /* ---- Section: Rewritable shared 32 KB---- */
+ shared-section@1f8000 {
+ label = "rw-shared";
+ reg = <0x001f8000 0x00006000>;
+ };
+ shared-dev-cfg@1f8000 {
+ label = "dev-cfg";
+ reg = <0x001f8000 0x00000000>;
+ type = "wiped";
+ wipe-value = [00];
+ };
+ shared-data@1f8000 {
+ label = "shared-data";
+ reg = <0x001f8000 0x00006000>;
+ type = "wiped";
+ wipe-value = [00];
+ };
+ shared-env@1fe000 {
+ label = "shared-env";
+ reg = <0x001fe000 0x00002000>;
+
+ /*
+ * We could put the dev environment here, but U-Boot
+ * has a default built in. Devs can 'saveenv' to set
+ * this up.
+ */
+ type = "wiped";
+ wipe-value = [00];
+ };
+ };
+};
diff --git a/board/nvidia/seaboard/flashmap-twostop-4mb.dtsi b/board/nvidia/seaboard/flashmap-twostop-4mb.dtsi
new file mode 100644
index 00000000000..59ddff76fae
--- /dev/null
+++ b/board/nvidia/seaboard/flashmap-twostop-4mb.dtsi
@@ -0,0 +1,150 @@
+/*
+* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+* Use of this source code is governed by a BSD-style license that can be
+* found in the LICENSE file.
+*/
+
+/*
+* This is the flash map (fmap) for a twostop firmware. It defines all the areas
+* that Chrome OS expects to find in its firmware device. The device is split
+* into a number of top-level sections, and within each are several areas.
+*
+* Available flags for each entry are: read-only, compresed.
+* All sections will be marked static in the fmap.
+*/
+
+/include/ "flashmap-ro.dtsi"
+
+/*
+* TODO: Although we can squeeze R/O and R/W blobs into 2 MB, we do not do
+* so because:
+*
+* - (A minor reason) Not every 4 MB flash chip can write-protect just the
+* first 1 MB.
+*
+* - (The main reason) We do not know how many tools or scripts implicitly
+* assume that R/O section consumes the first half 2 MB.
+*
+* In the long run, we should find and fix all those tools and scripts that
+* have incorrect implicit assumption of R/O section, but for now, we just
+* cannot squeeze the image size down to 2 MB at the risk of wrongly write-
+* protecting the R/W blobs.
+*/
+
+/ {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "winbond,W25Q32BVSSIG", "cfi-flash",
+ "chromeos,flashmap";
+ reg = <0x00000000 0x00400000>;
+
+ /* ---- Section: Spare. unused 1MB---- */
+ ro-spare@100000 {
+ label = "shared-spare";
+ reg = <0x00100000 0x00100000>;
+ };
+
+ /* ---- Section: Rewritable slot A ---- */
+ rw-a@200000 {
+ label = "rw-section-a";
+ reg = <0x00200000 0x00078000>;
+ };
+ rw-a-boot@200000 {
+ label = "fw-main-a";
+ reg = <0x00200000 0x00076000>;
+ type = "blob boot";
+ };
+ rw-a-vblock@276000 {
+ label = "vblock-a";
+ reg = <0x00276000 0x00001f00>;
+ type = "keyblock boot";
+ keyblock = "dev_firmware.keyblock";
+ signprivate = "dev_firmware_data_key.vbprivk";
+ version = <1>;
+ kernelkey = "kernel_subkey.vbpubk";
+ preamble-flags = <1>;
+ };
+ rw-a-firmware-id@277f00 {
+ label = "rw-fwid-a";
+ reg = <0x00277f00 0x00000100>;
+ read-only;
+ type = "blobstring fwid";
+ };
+
+ /* ---- Section: Rewritable slot B ---- */
+ rw-b@278000 {
+ label = "rw-section-b";
+ reg = <0x00278000 0x00078000>;
+ };
+ rw-b-boot@278000 {
+ label = "fw-main-b";
+ reg = <0x00278000 0x00076000>;
+ type = "blob boot";
+ };
+ rw-b-vblock@2ee000 {
+ label = "vblock-b";
+ reg = <0x002ee000 0x00001f00>;
+ type = "keyblock boot";
+ keyblock = "firmware.keyblock";
+ signprivate = "firmware_data_key.vbprivk";
+ version = <1>;
+ kernelkey = "kernel_subkey.vbpubk";
+ preamble-flags = <1>;
+ };
+ rw-b-firmware-id@2eff00 {
+ label = "rw-fwid-a";
+ reg = <0x002eff00 0x00000100>;
+ read-only;
+ type = "blobstring fwid";
+ };
+
+ /* ---- Section: Rewritable VPD 32 KB ---- */
+ rw-vpd-section@2f0000 {
+ label = "rw-vpd-section";
+ reg = <0x002f0000 0x00008000>;
+ };
+ rw-vpd@2f0000 {
+ label = "rw-vpd";
+ reg = <0x002f0000 0x00008000>;
+ type = "wiped";
+ wipe-value = [ff];
+ };
+
+ /* ---- Section: Rewritable shared 32 KB---- */
+ shared-section@2f8000 {
+ label = "rw-shared";
+ reg = <0x002f8000 0x00006000>;
+ };
+ shared-dev-cfg@2f8000 {
+ label = "dev-cfg";
+ reg = <0x002f8000 0x00000000>;
+ type = "wiped";
+ wipe-value = [00];
+ };
+ shared-data@2f8000 {
+ label = "shared-data";
+ reg = <0x002f8000 0x00006000>;
+ type = "wiped";
+ wipe-value = [00];
+ };
+ shared-env@2fe000 {
+ label = "shared-env";
+ reg = <0x002fe000 0x00002000>;
+
+ /*
+ * We could put the dev environment here, but U-Boot
+ * has a default built in. Devs can 'saveenv' to set
+ * this up.
+ */
+ type = "wiped";
+ wipe-value = [00];
+ };
+
+ /* ---- Section: Spare. unused 1MB---- */
+ shared-spare@300000 {
+ label = "shared-spare";
+ reg = <0x00300000 0x00100000>;
+ };
+ };
+};
diff --git a/board/nvidia/seaboard/flashmap-twostop-seaboard.dtsi b/board/nvidia/seaboard/flashmap-twostop-seaboard.dtsi
deleted file mode 100644
index 45c5a8f9112..00000000000
--- a/board/nvidia/seaboard/flashmap-twostop-seaboard.dtsi
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * This is the flash map (fmap) for a twostop firmware. It defines all the areas
- * that Chrome OS expects to find in its firmware device. The device is split
- * into a number of top-level sections, and within each are several areas.
- *
- * Available flags for each entry are: read-only, compresed.
- * All sections will be marked static in the fmap.
- */
-
-/include/ "onestop-layout.dtsi"
-/include/ "flashmap-twostop-ro-submap.dtsi"
-
-/ {
- flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "winbond,W25Q32BVSSIG", "cfi-flash",
- "chromeos,flashmap";
- reg = <0x00000000 0x00200000>;
-
- /* ---- Section: Readwrite ---- */
- readwrite@1e4000 {
- label = "readwrite";
- reg = <0x001e4000 0x00000000>;
- };
- rw-vpd@1e4000 {
- label = "rw-vpd";
- reg = <0x001e4000 0x00001000>;
- type = "wiped";
- wipe-value = [ff];
- };
- shared-dev-cfg@1e5000 {
- label = "shared-dev-cfg";
- reg = <0x001e5000 0x00001000>;
- type = "wiped";
- wipe-value = [00];
- };
- shared-data@1e6000 {
- label = "shared-data";
- reg = <0x001e6000 0x00001000>;
- type = "wiped";
- wipe-value = [00];
- };
- shared-env@1e7000 {
- label = "shared-env";
- reg = <0x001e7000 0x00019000>;
-
- /*
- * We could put the dev environment here, but U-Boot
- * has a default built in. Devs can 'saveenv' to set
- * this up.
- */
- type = "wiped";
- wipe-value = [00];
- };
-
- /* ---- Section: Readwrite Slot A and B ---- */
- /* So far only onestop is put into readwrite A/B section */
- readwrite-a@100000 {
- label = "readwrite-a";
- reg = <0x00100000 0x00072000>;
- block-lba = <0x00000022>;
- };
- rw-a-onestop@100000 {
- label = "rw-a-onestop";
- reg = <0x00100000 0x00072000>;
- type = "blob boot";
- };
- readwrite-b@172000 {
- label = "readwrite-b";
- reg = <0x00172000 0x00072000>;
- block-lba = <0x00000422>;
- };
- rw-b-onestop@172000 {
- label = "rw-b-onestop";
- reg = <0x00172000 0x00072000>;
- type = "blob boot";
- };
- };
-};
diff --git a/board/nvidia/seaboard/flashmap-twostop.dtsi b/board/nvidia/seaboard/flashmap-twostop.dtsi
deleted file mode 100644
index ed2b4bab780..00000000000
--- a/board/nvidia/seaboard/flashmap-twostop.dtsi
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * This is the flash map (fmap) for a twostop firmware. It defines all the areas
- * that Chrome OS expects to find in its firmware device. The device is split
- * into a number of top-level sections, and within each are several areas.
- *
- * Available flags for each entry are: read-only, compresed.
- * All sections will be marked static in the fmap.
- */
-
-/include/ "onestop-layout.dtsi"
-/include/ "flashmap-twostop-ro-submap.dtsi"
-
-/*
- * TODO: Although we can squeeze R/O and R/W blobs into 2 MB, we do not do
- * so because:
- *
- * - (A minor reason) Not every 4 MB flash chip can write-protect just the
- * first 1 MB.
- *
- * - (The main reason) We do not know how many tools or scripts implicitly
- * assume that R/O section consumes the first half 2 MB.
- *
- * In the long run, we should find and fix all those tools and scripts that
- * have incorrect implicit assumption of R/O section, but for now, we just
- * cannot squeeze the image size down to 2 MB at the risk of wrongly write-
- * protecting the R/W blobs.
- */
-
-/ {
- flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "winbond,W25Q32BVSSIG", "cfi-flash",
- "chromeos,flashmap";
- reg = <0x00000000 0x00400000>;
-
- /* ---- Section: Readwrite ---- */
- readwrite@300000 {
- label = "readwrite";
- reg = <0x00300000 0x00100000>;
- };
- rw-vpd@300000 {
- label = "rw-vpd";
- reg = <0x00300000 0x00080000>;
- type = "wiped";
- wipe-value = [ff];
- };
- shared-dev-cfg@380000 {
- label = "shared-dev-cfg";
- reg = <0x00380000 0x00040000>;
- type = "wiped";
- wipe-value = [00];
- };
- shared-data@3c0000 {
- label = "shared-data";
- reg = <0x003c0000 0x00030000>;
- type = "wiped";
- wipe-value = [00];
- };
- shared-env@3f0000 {
- label = "shared-env";
- reg = <0x003f0000 0x00010000>;
-
- /*
- * We could put the dev environment here, but U-Boot
- * has a default built in. Devs can 'saveenv' to set
- * this up.
- */
- type = "wiped";
- wipe-value = [00];
- };
-
- /* ---- Section: Readwrite Slot A and B ---- */
- /* So far only a onestop blob is put into readwrite A/B slot */
- readwrite-a@200000 {
- label = "readwrite-a";
- reg = <0x00200000 0x00080000>;
- block-lba = <0x00000022>;
- };
- rw-a-onestop@200000 {
- label = "rw-a-onestop";
- reg = <0x00200000 0x00072000>;
- };
- readwrite-b@280000 {
- label = "readwrite-b";
- reg = <0x00280000 0x00080000>;
- block-lba = <0x00000422>;
- };
- rw-b-onestop@280000 {
- label = "rw-b-onestop";
- reg = <0x00280000 0x00072000>;
- };
- };
-};
diff --git a/board/nvidia/seaboard/onestop-layout.dtsi b/board/nvidia/seaboard/onestop-layout.dtsi
deleted file mode 100644
index 994051ad795..00000000000
--- a/board/nvidia/seaboard/onestop-layout.dtsi
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * This is a flash map (fmap) defines the internal layout of onestop blobs
- * in R/W slot A and slot B. Given that, the addresses here are interpreted
- * as relative offset from its enclosing onestop blob.
- *
- * The onestop layout is made smaller than 512 KB so that two onestop blobs
- * together are smaller than 1 MB and it is possible to squeeze the entire
- * R/W section into 1 MB (the R/W section includes two onestop blobs and
- * read-write data blobs).
- */
-
-/ {
- flash@0 {
- /* total size of onestop blob: ~468 KB */
- onestop-layout {
- label = "onestop-layout";
- reg = <0x00000000 0x00072000>;
- type = "blob boot";
- };
-
- /* U-Boot image including fdt: ~460 KB */
- firmware-image {
- label = "firmware-image";
- reg = <0x00000000 0x00070000>;
- };
-
- /* verification block: ~8 KB */
- verification-block {
- label = "verification-block";
- reg = <0x00070000 0x00001f00>;
- };
-
- /* frimware ID: 256 Bytes */
- firmware-id {
- label = "firmware-id";
- reg = <0x00071f00 0x00000100>;
- };
- };
-};
diff --git a/board/nvidia/seaboard/tegra2-aebl.dts b/board/nvidia/seaboard/tegra2-aebl.dts
index dbc6a1bf7b2..ae635d97506 100644
--- a/board/nvidia/seaboard/tegra2-aebl.dts
+++ b/board/nvidia/seaboard/tegra2-aebl.dts
@@ -2,7 +2,7 @@
/memreserve/ 0x1c000000 0x04000000;
/include/ "tegra250.dtsi"
-/include/ "flashmap-twostop.dtsi"
+/include/ "flashmap-twostop-4mb.dtsi"
/ {
model = "Google Aebl";
diff --git a/board/nvidia/seaboard/tegra2-kaen.dts b/board/nvidia/seaboard/tegra2-kaen.dts
index 03a7cef396d..179a2184e5e 100644
--- a/board/nvidia/seaboard/tegra2-kaen.dts
+++ b/board/nvidia/seaboard/tegra2-kaen.dts
@@ -2,7 +2,7 @@
/memreserve/ 0x1c000000 0x04000000;
/include/ "tegra250.dtsi"
-/include/ "flashmap-twostop.dtsi"
+/include/ "flashmap-twostop-4mb.dtsi"
/ {
model = "Google Kaen";
diff --git a/board/nvidia/seaboard/tegra2-seaboard.dts b/board/nvidia/seaboard/tegra2-seaboard.dts
index 34b7aa24e0b..bb3b00fb867 100644
--- a/board/nvidia/seaboard/tegra2-seaboard.dts
+++ b/board/nvidia/seaboard/tegra2-seaboard.dts
@@ -2,7 +2,7 @@
/memreserve/ 0x1c000000 0x04000000;
/include/ "tegra250.dtsi"
-/include/ "flashmap-twostop-seaboard.dtsi"
+/include/ "flashmap-twostop-2mb.dtsi"
/ {
model = "NVIDIA Seaboard";
@@ -76,7 +76,7 @@
power-gpio = <&gpio 70 3>; /* power enable, gpio PI6 */
};
- sdhci@c8000600 {
+ emmc: sdhci@c8000600 {
status = "ok";
width = <4>; /* width of SDIO port */
removable = <0>;