Merge branch 'master' of git://git.denx.de/u-boot-blackfin

54 files changed, 897 insertions, 405 deletions

diff --git a/board/bct-brettl2/Makefile b/board/bct-brettl2/Makefile
new file mode 100644
index 0000000000..cf99d29f1c
--- /dev/null
+++ b/board/bct-brettl2/Makefile
@@ -0,0 +1,51 @@
+#
+# U-boot - Makefile
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS-y	:= $(BOARD).o gpio_cfi_flash.o cled.o
+COBJS-$(CONFIG_BFIN_MAC) += smsc9303.o
+
+SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS-y))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
diff --git a/board/bct-brettl2/bct-brettl2.c b/board/bct-brettl2/bct-brettl2.c
new file mode 100644
index 0000000000..de5b9ff0e7
--- /dev/null
+++ b/board/bct-brettl2/bct-brettl2.c
@@ -0,0 +1,123 @@
+/*
+ * U-boot - main board file for BCT brettl2
+ *
+ * Copyright (c) 2010 BCT Electronic GmbH
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <config.h>
+#include <command.h>
+#include <asm/blackfin.h>
+#include <asm/portmux.h>
+#include <asm/gpio.h>
+#include <asm/net.h>
+#include <net.h>
+#include <netdev.h>
+#include <miiphy.h>
+
+#include "../cm-bf537e/gpio_cfi_flash.h"
+#include "smsc9303.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+	printf("Board: bct-brettl2 board\n");
+	printf("       Support: http://www.bct-electronic.com/\n");
+	return 0;
+}
+
+#ifdef CONFIG_BFIN_MAC
+static void board_init_enetaddr(uchar *mac_addr)
+{
+	puts("Warning: Generating 'random' MAC address\n");
+	bfin_gen_rand_mac(mac_addr);
+	eth_setenv_enetaddr("ethaddr", mac_addr);
+}
+
+int board_eth_init(bd_t *bis)
+{
+	int retry = 3;
+	int ret;
+
+	ret = bfin_EMAC_initialize(bis);
+
+	uchar enetaddr[6];
+	if (eth_getenv_enetaddr("ethaddr", enetaddr)) {
+		printf("setting MAC %pM\n", enetaddr);
+	}
+	puts("       ");
+
+	puts("initialize SMSC LAN9303i ethernet switch\n");
+
+	while (retry-- > 0) {
+		if (init_smsc9303i_mii())
+			return ret;
+	}
+
+	return ret;
+}
+#endif
+
+static void init_tlv320aic31(void)
+{
+	puts("Audio: setup TIMER0 to enable 16.384 MHz clock for tlv320aic31\n");
+	peripheral_request(P_TMR0, "tlv320aic31 clock");
+	bfin_write_TIMER0_CONFIG(0x020d);
+	bfin_write_TIMER0_PERIOD(0x0008);
+	bfin_write_TIMER0_WIDTH(0x0008/2);
+	bfin_write_TIMER_ENABLE(bfin_read_TIMER_ENABLE() | 1);
+	SSYNC();
+	udelay(10000);
+
+	puts("       resetting tlv320aic31\n");
+
+	gpio_request(GPIO_PF2, "tlv320aic31");
+	gpio_direction_output(GPIO_PF2, 0);
+	udelay(10000);
+	gpio_direction_output(GPIO_PF2, 1);
+	udelay(10000);
+	gpio_free(GPIO_PF2);
+}
+
+static void init_mute_pin(void)
+{
+	printf("       unmute class D amplifier\n");
+
+	gpio_request(GPIO_PF5, "mute");
+	gpio_direction_output(GPIO_PF5, 1);
+	gpio_free(GPIO_PF5);
+}
+
+/* sometimes LEDs (speech, status) are still on after reboot, turn 'em off */
+static void turn_leds_off(void)
+{
+	printf("       turn LEDs off\n");
+
+	gpio_request(GPIO_PF6, "led");
+	gpio_direction_output(GPIO_PF6, 0);
+	gpio_free(GPIO_PF6);
+
+	gpio_request(GPIO_PF15, "led");
+	gpio_direction_output(GPIO_PF15, 0);
+	gpio_free(GPIO_PF15);
+}
+
+/* miscellaneous platform dependent initialisations */
+int misc_init_r(void)
+{
+#ifdef CONFIG_BFIN_MAC
+	uchar enetaddr[6];
+	if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+		board_init_enetaddr(enetaddr);
+#endif
+
+	gpio_cfi_flash_init();
+	init_tlv320aic31();
+	init_mute_pin();
+	turn_leds_off();
+
+	return 0;
+}
diff --git a/board/bct-brettl2/cled.c b/board/bct-brettl2/cled.c
new file mode 100644
index 0000000000..9e73c57b87
--- /dev/null
+++ b/board/bct-brettl2/cled.c
@@ -0,0 +1,32 @@
+/*
+ * cled.c - control color led
+ *
+ * Copyright (c) 2010 BCT Electronic GmbH
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/blackfin.h>
+#include <asm/io.h>
+
+int do_cled(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	ulong addr = 0x20000000 + 0x200000; // AMS2
+	uchar data;
+
+	if (argc < 2)
+		return cmd_usage(cmdtp);
+
+	data = simple_strtoul(argv[1], NULL, 10);
+	outb(data, addr);
+
+	printf("cled, write %02x\n", data);
+
+	return 0;
+}
+
+U_BOOT_CMD(cled, 2, 0, do_cled,
+	"set/clear color LED",
+	"");
diff --git a/board/bct-brettl2/config.mk b/board/bct-brettl2/config.mk
new file mode 100644
index 0000000000..dfd94569e1
--- /dev/null
+++ b/board/bct-brettl2/config.mk
@@ -0,0 +1,35 @@
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+# This is not actually used for Blackfin boards so do not change it
+#TEXT_BASE = do-not-use-me
+
+CONFIG_BFIN_CPU = bf536-0.3
+
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
+
+# Set some default LDR flags based on boot mode.
+LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/bct-brettl2/gpio_cfi_flash.c b/board/bct-brettl2/gpio_cfi_flash.c
new file mode 100644
index 0000000000..b385c7fc0e
--- /dev/null
+++ b/board/bct-brettl2/gpio_cfi_flash.c
@@ -0,0 +1,4 @@
+#define GPIO_PIN_1 GPIO_PG5
+#define GPIO_PIN_2 GPIO_PG6
+#define GPIO_PIN_3 GPIO_PG7
+#include "../cm-bf537e/gpio_cfi_flash.c"
diff --git a/board/bct-brettl2/smsc9303.c b/board/bct-brettl2/smsc9303.c
new file mode 100644
index 0000000000..15eea7a484
--- /dev/null
+++ b/board/bct-brettl2/smsc9303.c
@@ -0,0 +1,176 @@
+/*
+ * smsc9303.c - routines to initialize SMSC 9303 switch
+ *
+ * Copyright (c) 2010 BCT Electronic GmbH
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <config.h>
+#include <miiphy.h>
+
+#include <asm/blackfin.h>
+#include <asm/gpio.h>
+
+static int smc9303i_write_mii(unsigned char addr, unsigned char reg, unsigned short data)
+{
+	const char *devname = miiphy_get_current_dev();
+
+	if (!devname)
+	    return 0;
+
+	if (miiphy_write(devname, addr, reg, data) != 0)
+	    return 0;
+
+	return 1;
+}
+
+static int smc9303i_write_reg(unsigned short reg, unsigned int data)
+{
+	const char *devname = miiphy_get_current_dev();
+	unsigned char mii_addr = 0x10 | (reg >> 6);
+	unsigned char mii_reg = (reg & 0x3c) >> 1;
+
+	if (!devname)
+	    return 0;
+
+	if (miiphy_write(devname, mii_addr, mii_reg|0, data & 0xffff) != 0)
+	    return 0;
+
+	if (miiphy_write(devname, mii_addr, mii_reg|1, data >> 16) != 0)
+	    return 0;
+
+	return 1;
+}
+
+static int smc9303i_read_reg(unsigned short reg, unsigned int *data)
+{
+	const char *devname = miiphy_get_current_dev();
+	unsigned char mii_addr = 0x10 | (reg >> 6);
+	unsigned char mii_reg = (reg & 0x3c) >> 1;
+	unsigned short tmp1, tmp2;
+
+	if (!devname)
+	    return 0;
+
+	if (miiphy_read(devname, mii_addr, mii_reg|0, &tmp1) != 0)
+	    return 0;
+
+	if (miiphy_read(devname, mii_addr, mii_reg|1, &tmp2) != 0)
+	    return 0;
+
+	*data = (tmp2 << 16) | tmp1;
+
+	return 1;
+}
+
+#if 0
+static int smc9303i_read_mii(unsigned char addr, unsigned char reg, unsigned short *data)
+{
+	const char *devname = miiphy_get_current_dev();
+
+	if (!devname)
+	    return 0;
+
+	if (miiphy_read(devname, addr, reg, data) != 0)
+	    return 0;
+
+	return 1;
+}
+#endif
+
+typedef struct {
+	unsigned short reg;
+	unsigned int value;
+} smsc9303i_config_entry1_t;
+
+static const smsc9303i_config_entry1_t smsc9303i_config_table1[] =
+{
+	{0x1a0, 0x00000006}, /* Port 1 Manual Flow Control Register */
+	{0x1a4, 0x00000006}, /* Port 2 Manual Flow Control Register */
+	{0x1a8, 0x00000006}, /* Port 0 Manual Flow Control Register */
+};
+
+typedef struct
+{
+	unsigned char addr;
+	unsigned char reg;
+	unsigned short value;
+} smsc9303i_config_entry2_t;
+
+static const smsc9303i_config_entry2_t smsc9303i_config_table2[] =
+{
+	{0x01, 0x00, 0x0100}, /* Port0 PHY Basic Control Register */
+	{0x02, 0x00, 0x1100}, /* Port1 PHY Basic Control Register */
+	{0x03, 0x00, 0x1100}, /* Port2 PHY Basic Control Register */
+
+	{0x01, 0x04, 0x0001}, /* Port0 PHY Auto-Negotiation Advertisement Register */
+	{0x02, 0x04, 0x2de1}, /* Port1 PHY Auto-Negotiation Advertisement Register */
+	{0x03, 0x04, 0x2de1}, /* Port2 PHY Auto-Negotiation Advertisement Register */
+
+	{0x01, 0x11, 0x0000}, /* Port0 PHY Mode Control/Status Register */
+	{0x02, 0x11, 0x0000}, /* Port1 PHY Mode Control/Status Register */
+	{0x03, 0x11, 0x0000}, /* Port2 PHY Mode Control/Status Register */
+
+	{0x01, 0x12, 0x0021}, /* Port0 PHY Special Modes Register */
+	{0x02, 0x12, 0x00e2}, /* Port1 PHY Special Modes Register */
+	{0x03, 0x12, 0x00e3}, /* Port2 PHY Special Modes Register */
+	{0x01, 0x1b, 0x0000}, /* Port0 PHY Special Control/Status Indication Register */
+	{0x02, 0x1b, 0x0000}, /* Port1 PHY Special Control/Status Indication Register */
+	{0x03, 0x1b, 0x0000}, /* Port2 PHY Special Control/Status Indication Register */
+	{0x01, 0x1e, 0x0000}, /* Port0 PHY Interrupt Source Flags Register */
+	{0x02, 0x1e, 0x0000}, /* Port1 PHY Interrupt Source Flags Register */
+	{0x03, 0x1e, 0x0000}, /* Port2 PHY Interrupt Source Flags Register */
+};
+
+int init_smsc9303i_mii(void)
+{
+	unsigned int data;
+	unsigned int i;
+
+	printf("       reset SMSC LAN9303i\n");
+
+	gpio_request(GPIO_PG10, "smsc9303");
+	gpio_direction_output(GPIO_PG10, 0);
+	udelay(10000);
+	gpio_direction_output(GPIO_PG10, 1);
+	udelay(10000);
+
+	gpio_free(GPIO_PG10);
+
+#if defined(CONFIG_MII_INIT)
+	mii_init();
+#endif
+
+	printf("       write SMSC LAN9303i configuration\n");
+
+	if (!smc9303i_read_reg(0x50, &data))
+		return 0;
+
+	if ((data >> 16) != 0x9303)	{
+		/* chip id not found */
+		printf("       error identifying SMSC LAN9303i\n");
+		return 0;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(smsc9303i_config_table1); i++) {
+		const smsc9303i_config_entry1_t *entry = &smsc9303i_config_table1[i];
+
+		if (!smc9303i_write_reg(entry->reg, entry->value)) {
+			printf("       error writing SMSC LAN9303i configuration\n");
+			return 0;
+		}
+	}
+
+	for (i = 0; i < ARRAY_SIZE(smsc9303i_config_table2); i++) {
+		const smsc9303i_config_entry2_t *entry = &smsc9303i_config_table2[i];
+
+		if (!smc9303i_write_mii(entry->addr, entry->reg, entry->value)) {
+			printf("       error writing SMSC LAN9303i configuration\n");
+			return 0;
+		}
+	}
+
+	return 1;
+}
diff --git a/board/bct-brettl2/smsc9303.h b/board/bct-brettl2/smsc9303.h
new file mode 100644
index 0000000000..a4ba40ef73
--- /dev/null
+++ b/board/bct-brettl2/smsc9303.h
@@ -0,0 +1,9 @@
+/*
+ * smsc9303.h - routines to initialize SMSC 9303 switch
+ *
+ * Copyright (c) 2010 BCT Electronic GmbH
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+int init_smsc9303i_mii(void);
diff --git a/board/bf518f-ezbrd/config.mk b/board/bf518f-ezbrd/config.mk
index 3f9d41f371..30b92a3c43 100644
--- a/board/bf518f-ezbrd/config.mk
+++ b/board/bf518f-ezbrd/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf518-0.0
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/bf526-ezbrd/config.mk b/board/bf526-ezbrd/config.mk
index 3f9d41f371..aaf4541feb 100644
--- a/board/bf526-ezbrd/config.mk
+++ b/board/bf526-ezbrd/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf526-0.0
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/bf527-ad7160-eval/bf527-ad7160-eval.c b/board/bf527-ad7160-eval/bf527-ad7160-eval.c
index b06d5ab2e8..ea405b639d 100644
--- a/board/bf527-ad7160-eval/bf527-ad7160-eval.c
+++ b/board/bf527-ad7160-eval/bf527-ad7160-eval.c
@@ -20,6 +20,6 @@ int checkboard(void)
 int misc_init_r(void)
 {
 	/* CLKIN Buffer Output Enable */
-	*pVR_CTL |= CLKBUFOE;
+	bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
 	return 0;
 }
diff --git a/board/bf527-ad7160-eval/config.mk b/board/bf527-ad7160-eval/config.mk
index 3f9d41f371..9784810af7 100644
--- a/board/bf527-ad7160-eval/config.mk
+++ b/board/bf527-ad7160-eval/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf527-0.2
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/bf527-ezkit/config.mk b/board/bf527-ezkit/config.mk
index 3f9d41f371..78eebff324 100644
--- a/board/bf527-ezkit/config.mk
+++ b/board/bf527-ezkit/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf527-0.0
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/bf527-ezkit/video.c b/board/bf527-ezkit/video.c
index 51bdf02041..87e7658b4d 100644
--- a/board/bf527-ezkit/video.c
+++ b/board/bf527-ezkit/video.c
@@ -162,12 +162,12 @@ static int lq035q1_control(unsigned char reg, unsigned short value)
 /* enable and disable PPI functions */
 void EnablePPI(void)
 {
-	*pPPI_CONTROL |= PORT_EN;
+	bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
 }
 
 void DisablePPI(void)
 {
-	*pPPI_CONTROL &= ~PORT_EN;
+	bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
 }
 
 void Init_Ports(void)
@@ -182,119 +182,123 @@ void Init_Ports(void)
 void Init_PPI(void)
 {
 
-	*pPPI_DELAY = H_START;
-	*pPPI_COUNT = (H_ACTPIX-1);
-	*pPPI_FRAME = V_LINES;
+	bfin_write_PPI_DELAY(H_START);
+	bfin_write_PPI_COUNT(H_ACTPIX - 1);
+	bfin_write_PPI_FRAME(V_LINES);
 
 	/* PPI control, to be replaced with definitions */
-	*pPPI_CONTROL = PPI_TX_MODE		|	/* output mode , PORT_DIR */
+	bfin_write_PPI_CONTROL(
+			PPI_TX_MODE		|	/* output mode , PORT_DIR */
 			PPI_XFER_TYPE_11	|	/* sync mode XFR_TYPE */
 			PPI_PORT_CFG_01		|	/* two frame sync PORT_CFG */
 			PPI_PACK_EN		|	/* packing enabled PACK_EN */
-			PPI_POLS_1;			/* faling edge syncs POLS */
+			PPI_POLS_1			/* faling edge syncs POLS */
+	);
 }
 
 void Init_DMA(void *dst)
 {
-	*pDMA0_START_ADDR = dst;
+	bfin_write_DMA0_START_ADDR(dst);
 
 	/* X count */
-	*pDMA0_X_COUNT = H_ACTPIX / 2;
-	*pDMA0_X_MODIFY = DMA_BUS_SIZE / 8;
+	bfin_write_DMA0_X_COUNT(H_ACTPIX / 2);
+	bfin_write_DMA0_X_MODIFY(DMA_BUS_SIZE / 8);
 
 	/* Y count */
-	*pDMA0_Y_COUNT = V_LINES;
-	*pDMA0_Y_MODIFY = DMA_BUS_SIZE / 8;
+	bfin_write_DMA0_Y_COUNT(V_LINES);
+	bfin_write_DMA0_Y_MODIFY(DMA_BUS_SIZE / 8);
 
 	/* DMA Config */
-	*pDMA0_CONFIG =
+	bfin_write_DMA0_CONFIG(
 		WDSIZE_16	|	/* 16 bit DMA */
 		DMA2D 		|	/* 2D DMA */
-		FLOW_AUTO;		/* autobuffer mode */
+		FLOW_AUTO		/* autobuffer mode */
+	);
 }
 
-
 void EnableDMA(void)
 {
-	*pDMA0_CONFIG |= DMAEN;
+	bfin_write_DMA0_CONFIG(bfin_read_DMA0_CONFIG() | DMAEN);
 }
 
 void DisableDMA(void)
 {
-	*pDMA0_CONFIG &= ~DMAEN;
+	bfin_write_DMA0_CONFIG(bfin_read_DMA0_CONFIG() & ~DMAEN);
 }
 
-
 /* Init TIMER0 as Frame Sync 1 generator */
 void InitTIMER0(void)
 {
-	*pTIMER_DISABLE |= TIMDIS0;			/* disable Timer */
+	bfin_write_TIMER_DISABLE(TIMDIS0);			/* disable Timer */
 	SSYNC();
-	*pTIMER_STATUS  |= TIMIL0 | TOVF_ERR0 | TRUN0;	/* clear status */
+	bfin_write_TIMER_STATUS(TIMIL0 | TOVF_ERR0 | TRUN0);	/* clear status */
 	SSYNC();
 
-	*pTIMER0_PERIOD  = H_PERIOD;
+	bfin_write_TIMER0_PERIOD(H_PERIOD);
 	SSYNC();
-	*pTIMER0_WIDTH   = H_PULSE;
+	bfin_write_TIMER0_WIDTH(H_PULSE);
 	SSYNC();
 
-	*pTIMER0_CONFIG  = PWM_OUT |
+	bfin_write_TIMER0_CONFIG(
+				PWM_OUT |
 				PERIOD_CNT   |
 				TIN_SEL      |
 				CLK_SEL      |
-				EMU_RUN;
+				EMU_RUN
+	);
 	SSYNC();
 }
 
 void EnableTIMER0(void)
 {
-	*pTIMER_ENABLE  |= TIMEN0;
+	bfin_write_TIMER_ENABLE(TIMEN0);
 	SSYNC();
 }
 
 void DisableTIMER0(void)
 {
-	*pTIMER_DISABLE  |= TIMDIS0;
+	bfin_write_TIMER_DISABLE(TIMDIS0);
 	SSYNC();
 }
 
 
 void InitTIMER1(void)
 {
-	*pTIMER_DISABLE |= TIMDIS1;			/* disable Timer */
+	bfin_write_TIMER_DISABLE(TIMDIS1);			/* disable Timer */
 	SSYNC();
-	*pTIMER_STATUS  |= TIMIL1 | TOVF_ERR1 | TRUN1;	/* clear status */
+	bfin_write_TIMER_STATUS(TIMIL1 | TOVF_ERR1 | TRUN1);	/* clear status */
 	SSYNC();
 
-
-	*pTIMER1_PERIOD  = V_PERIOD;
+	bfin_write_TIMER1_PERIOD(V_PERIOD);
 	SSYNC();
-	*pTIMER1_WIDTH   = V_PULSE;
+	bfin_write_TIMER1_WIDTH(V_PULSE);
 	SSYNC();
 
-	*pTIMER1_CONFIG  = PWM_OUT |
+	bfin_write_TIMER1_CONFIG(
+				PWM_OUT |
 				PERIOD_CNT   |
 				TIN_SEL      |
 				CLK_SEL      |
-				EMU_RUN;
+				EMU_RUN
+	);
 	SSYNC();
 }
 
 void EnableTIMER1(void)
 {
-	*pTIMER_ENABLE  |= TIMEN1;
+	bfin_write_TIMER_ENABLE(TIMEN1);
 	SSYNC();
 }
 
 void DisableTIMER1(void)
 {
-	*pTIMER_DISABLE  |= TIMDIS1;
+	bfin_write_TIMER_DISABLE(TIMDIS1);
 	SSYNC();
 }
 
 void EnableTIMER12(void)
 {
-	*pTIMER_ENABLE |= TIMEN1 | TIMEN0;
+	bfin_write_TIMER_ENABLE(TIMEN1 | TIMEN0);
 	SSYNC();
 }
 
diff --git a/board/bf527-sdp/Makefile b/board/bf527-sdp/Makefile
new file mode 100644
index 0000000000..f2bd2c247d
--- /dev/null
+++ b/board/bf527-sdp/Makefile
@@ -0,0 +1,54 @@
+#
+# U-boot - Makefile
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS-y	:= $(BOARD).o
+
+SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS-y))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/bf527-sdp/bf527-sdp.c b/board/bf527-sdp/bf527-sdp.c
new file mode 100644
index 0000000000..504869d72a
--- /dev/null
+++ b/board/bf527-sdp/bf527-sdp.c
@@ -0,0 +1,32 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2010 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <asm/blackfin.h>
+#include <asm/gpio.h>
+#include <asm/mach-common/bits/pll.h>
+
+int checkboard(void)
+{
+	printf("Board: ADI BF527 SDP board\n");
+	printf("       Support: http://blackfin.uclinux.org/\n");
+
+	/* Enable access to parallel flash */
+	gpio_request(GPIO_PG0, "parallel-flash");
+	gpio_direction_output(GPIO_PG0, 0);
+
+	return 0;
+}
+
+int misc_init_r(void)
+{
+	/* CLKIN Buffer Output Enable */
+	bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
+
+	return 0;
+}
diff --git a/board/bf527-sdp/config.mk b/board/bf527-sdp/config.mk
new file mode 100644
index 0000000000..744e7a5d0d
--- /dev/null
+++ b/board/bf527-sdp/config.mk
@@ -0,0 +1,36 @@
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+# This is not actually used for Blackfin boards so do not change it
+#TEXT_BASE = do-not-use-me
+
+CONFIG_BFIN_CPU = bf527-0.2
+
+CFLAGS_lib_generic += -O2
+CFLAGS_lzma += -O2
+
+# Set some default LDR flags based on boot mode.
+LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 6
+LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/bf533-ezkit/config.mk b/board/bf533-ezkit/config.mk
index bc046f129f..60ec6b6c14 100644
--- a/board/bf533-ezkit/config.mk
+++ b/board/bf533-ezkit/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf533-0.3
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/bf533-stamp/config.mk b/board/bf533-stamp/config.mk
index bc046f129f..60ec6b6c14 100644
--- a/board/bf533-stamp/config.mk
+++ b/board/bf533-stamp/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf533-0.3
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/bf537-minotaur/config.mk b/board/bf537-minotaur/config.mk
index d8308433b0..59e9a9c447 100644
--- a/board/bf537-minotaur/config.mk
+++ b/board/bf537-minotaur/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf537-0.2
+
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_UART       := --port g --gpio 6
 LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/bf537-pnav/config.mk b/board/bf537-pnav/config.mk
index eaa09ff795..ce8ef3b499 100644
--- a/board/bf537-pnav/config.mk
+++ b/board/bf537-pnav/config.mk
@@ -26,5 +26,7 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf537-0.2
+
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/bf537-srv1/config.mk b/board/bf537-srv1/config.mk
index d8308433b0..59e9a9c447 100644
--- a/board/bf537-srv1/config.mk
+++ b/board/bf537-srv1/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf537-0.2
+
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_UART       := --port g --gpio 6
 LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/bf537-stamp/config.mk b/board/bf537-stamp/config.mk
index 5766829115..3bac0adf3b 100644
--- a/board/bf537-stamp/config.mk
+++ b/board/bf537-stamp/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf537-0.2
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/bf537-stamp/post-memory.c b/board/bf537-stamp/post-memory.c
index 4daea627ef..49022dc930 100644
--- a/board/bf537-stamp/post-memory.c
+++ b/board/bf537-stamp/post-memory.c
@@ -97,19 +97,19 @@ void post_init_uart(int sclk)
 	for (divisor = 0; sclk > 0; divisor++)
 		sclk -= 57600 * 16;
 
-	*pPORTF_FER = 0x000F;
-	*pPORTH_FER = 0xFFFF;
+	bfin_write_PORTF_FER(0x000F);
+	bfin_write_PORTH_FER(0xFFFF);
 
-	*pUART_GCTL = 0x00;
-	*pUART_LCR = 0x83;
+	bfin_write_UART_GCTL(0x00);
+	bfin_write_UART_LCR(0x83);
 	SSYNC();
-	*pUART_DLL = (divisor & 0xFF);
+	bfin_write_UART_DLL(divisor & 0xFF);
 	SSYNC();
-	*pUART_DLH = ((divisor >> 8) & 0xFF);
+	bfin_write_UART_DLH((divisor >> 8) & 0xFF);
 	SSYNC();
-	*pUART_LCR = 0x03;
+	bfin_write_UART_LCR(0x03);
 	SSYNC();
-	*pUART_GCTL = 0x01;
+	bfin_write_UART_GCTL(0x01);
 	SSYNC();
 }
 
@@ -121,8 +121,8 @@ void post_out_buff(char *buff)
 		;
 	i = 0;
 	while ((buff[i] != '\0') && (i != 100)) {
-		while (!(*pUART_LSR & 0x20)) ;
-		*pUART_THR = buff[i];
+		while (!(bfin_read_pUART_LSR() & 0x20)) ;
+		bfin_write_UART_THR(buff[i]);
 		SSYNC();
 		i++;
 	}
@@ -138,15 +138,15 @@ int post_key_pressed(void)
 	int i, n;
 	unsigned short value;
 
-	*pPORTF_FER &= ~PF5;
-	*pPORTFIO_DIR &= ~PF5;
-	*pPORTFIO_INEN |= PF5;
+	bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~PF5);
+	bfin_write_PORTFIO_DIR(bfin_read_PORTFIO_DIR() & ~PF5);
+	bfin_write_PORTFIO_INEN(bfin_read_PORTFIO_INEN() | PF5);
 	SSYNC();
 
 	post_out_buff("########Press SW10 to enter Memory POST########: 3\0");
 	for (i = 0; i < KEY_LOOP; i++) {
-		value = *pPORTFIO & PF5;
-		if (*pUART0_RBR == 0x0D) {
+		value = bfin_read_PORTFIO() & PF5;
+		if (bfin_read_UART0_RBR() == 0x0D) {
 			value = 0;
 			goto key_pressed;
 		}
@@ -158,8 +158,8 @@ int post_key_pressed(void)
 	post_out_buff("\b2\0");
 
 	for (i = 0; i < KEY_LOOP; i++) {
-		value = *pPORTFIO & PF5;
-		if (*pUART0_RBR == 0x0D) {
+		value = bfin_read_PORTFIO() & PF5;
+		if (bfin_read_UART0_RBR() == 0x0D) {
 			value = 0;
 			goto key_pressed;
 		}
@@ -171,8 +171,8 @@ int post_key_pressed(void)
 	post_out_buff("\b1\0");
 
 	for (i = 0; i < KEY_LOOP; i++) {
-		value = *pPORTFIO & PF5;
-		if (*pUART0_RBR == 0x0D) {
+		value = bfin_read_PORTFIO() & PF5;
+		if (bfin_read_UART0_RBR() == 0x0D) {
 			value = 0;
 			goto key_pressed;
 		}
@@ -193,13 +193,13 @@ int post_key_pressed(void)
 void post_init_pll(int mult, int div)
 {
 
-	*pSIC_IWR = 0x01;
-	*pPLL_CTL = (mult << 9);
-	*pPLL_DIV = div;
+	bfin_write_SIC_IWR(0x01);
+	bfin_write_PLL_CTL((mult << 9));
+	bfin_write_PLL_DIV(div);
 	asm("CLI R2;");
 	asm("IDLE;");
 	asm("STI R2;");
-	while (!(*pPLL_STAT & 0x20)) ;
+	while (!(bfin_read_PLL_STAT() & 0x20)) ;
 }
 
 int post_init_sdram(int sclk)
@@ -302,15 +302,15 @@ int post_init_sdram(int sclk)
 
 	SSYNC();
 
-	*pEBIU_SDGCTL |= 0x1000000;
+	bfin_write_EBIU_SDGCTL(bfin_write_EBIU_SDGCTL() | 0x1000000);
 	/* Set the SDRAM Refresh Rate control register based on SSCLK value */
-	*pEBIU_SDRRC = mem_SDRRC;
+	bfin_write_EBIU_SDRRC(mem_SDRRC);
 
 	/* SDRAM Memory Bank Control Register */
-	*pEBIU_SDBCTL = mem_SDBCTL;
+	bfin_write_EBIU_SDBCTL(mem_SDBCTL);
 
 	/* SDRAM Memory Global Control Register */
-	*pEBIU_SDGCTL = mem_SDGCTL;
+	bfin_write_EBIU_SDGCTL(mem_SDGCTL);
 	SSYNC();
 	return mem_SDRRC;
 }
diff --git a/board/bf537-stamp/post.c b/board/bf537-stamp/post.c
index c546ab6cb6..60eed5f68a 100644
--- a/board/bf537-stamp/post.c
+++ b/board/bf537-stamp/post.c
@@ -12,6 +12,7 @@
 #include <config.h>
 #include <command.h>
 #include <asm/blackfin.h>
+#include <asm/gpio.h>
 
 /* Using sw10-PF5 as the hotkey */
 int post_hotkeys_pressed(void)
@@ -20,14 +21,13 @@ int post_hotkeys_pressed(void)
 	int i;
 	unsigned short value;
 
-	*pPORTF_FER &= ~PF5;
-	*pPORTFIO_DIR &= ~PF5;
-	*pPORTFIO_INEN |= PF5;
+	gpio_request(GPIO_PF5, "post");
+	gpio_direction_input(GPIO_PF5);
 
 	printf("########Press SW10 to enter Memory POST########: %2d ", delay);
 	while (delay--) {
 		for (i = 0; i < 100; i++) {
-			value = *pPORTFIO & PF5;
+			value = gpio_get_value(GPIO_PF5);
 			if (value != 0) {
 				break;
 			}
@@ -43,6 +43,8 @@ int post_hotkeys_pressed(void)
 		printf("Hotkey has been pressed, Enter POST . . . . . .\n");
 		return 1;
 	}
+
+	gpio_free(GPIO_PF5);
 }
 
 int uart_post_test(int flags)
@@ -106,34 +108,24 @@ int flash_post_test(int flags)
  ****************************************************/
 int led_post_test(int flags)
 {
-	*pPORTF_FER &= ~(PF6 | PF7 | PF8 | PF9 | PF10 | PF11);
-	*pPORTFIO_DIR |= PF6 | PF7 | PF8 | PF9 | PF10 | PF11;
-	*pPORTFIO_INEN &= ~(PF6 | PF7 | PF8 | PF9 | PF10 | PF11);
-	*pPORTFIO &= ~(PF6 | PF7 | PF8 | PF9 | PF10 | PF11);
-	udelay(1000000);
-	printf("LED1 on");
-	*pPORTFIO |= PF6;
-	udelay(1000000);
-	printf("\b\b\b\b\b\b\b");
-	printf("LED2 on");
-	*pPORTFIO |= PF7;
-	udelay(1000000);
-	printf("\b\b\b\b\b\b\b");
-	printf("LED3 on");
-	*pPORTFIO |= PF8;
-	udelay(1000000);
-	printf("\b\b\b\b\b\b\b");
-	printf("LED4 on");
-	*pPORTFIO |= PF9;
-	udelay(1000000);
-	printf("\b\b\b\b\b\b\b");
-	printf("LED5 on");
-	*pPORTFIO |= PF10;
-	udelay(1000000);
-	printf("\b\b\b\b\b\b\b");
-	printf("lED6 on");
-	*pPORTFIO |= PF11;
-	printf("\b\b\b\b\b\b\b ");
+	unsigned int leds[] = {
+		GPIO_PF6, GPIO_PF7, GPIO_PF8,
+		GPIO_PF9, GPIO_PF10, GPIO_PF11,
+	};
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(leds); ++i) {
+		gpio_request(leds[i], "post");
+		gpio_direction_output(leds[i], 0);
+
+		printf("LED%i on", i + 1);
+		gpio_set_value(leds[i], 1);
+		udelay(1000000);
+		printf("\b\b\b\b\b\b\b");
+
+		gpio_free(leds[i]);
+	}
+
 	return 0;
 }
 
@@ -143,88 +135,40 @@ int led_post_test(int flags)
  ************************************************/
 int button_post_test(int flags)
 {
+	unsigned int buttons[] = {
+		GPIO_PF2, GPIO_PF3, GPIO_PF4, GPIO_PF5,
+	};
+	unsigned int sws[] = { 13, 12, 11, 10, };
 	int i, delay = 5;
 	unsigned short value = 0;
 	int result = 0;
 
-	*pPORTF_FER &= ~(PF5 | PF4 | PF3 | PF2);
-	*pPORTFIO_DIR &= ~(PF5 | PF4 | PF3 | PF2);
-	*pPORTFIO_INEN |= (PF5 | PF4 | PF3 | PF2);
+	for (i = 0; i < ARRAY_SIZE(buttons); ++i) {
+		gpio_request(buttons[i], "post");
+		gpio_direction_input(buttons[i]);
 
-	printf("\n--------Press SW10: %2d ", delay);
-	while (delay--) {
-		for (i = 0; i < 100; i++) {
-			value = *pPORTFIO & PF5;
-			if (value != 0) {
-				break;
+		delay = 5;
+		printf("\n--------Press SW%i: %2d ", sws[i], delay);
+		while (delay--) {
+			for (i = 0; i < 100; i++) {
+				value = gpio_get_value(buttons[i]);
+				if (value != 0)
+					break;
+				udelay(10000);
 			}
-			udelay(10000);
+			printf("\b\b\b%2d ", delay);
 		}
-		printf("\b\b\b%2d ", delay);
-	}
-	if (value != 0)
-		printf("\b\bOK");
-	else {
-		result = -1;
-		printf("\b\bfailed");
-	}
-
-	delay = 5;
-	printf("\n--------Press SW11: %2d ", delay);
-	while (delay--) {
-		for (i = 0; i < 100; i++) {
-			value = *pPORTFIO & PF4;
-			if (value != 0) {
-				break;
-			}
-			udelay(10000);
+		if (value != 0)
+			puts("\b\bOK");
+		else {
+			result = -1;
+			puts("\b\bfailed");
 		}
-		printf("\b\b\b%2d ", delay);
-	}
-	if (value != 0)
-		printf("\b\bOK");
-	else {
-		result = -1;
-		printf("\b\bfailed");
-	}
 
-	delay = 5;
-	printf("\n--------Press SW12: %2d ", delay);
-	while (delay--) {
-		for (i = 0; i < 100; i++) {
-			value = *pPORTFIO & PF3;
-			if (value != 0) {
-				break;
-			}
-			udelay(10000);
-		}
-		printf("\b\b\b%2d ", delay);
-	}
-	if (value != 0)
-		printf("\b\bOK");
-	else {
-		result = -1;
-		printf("\b\bfailed");
+		gpio_free(buttons[i]);
 	}
 
-	delay = 5;
-	printf("\n--------Press SW13: %2d ", delay);
-	while (delay--) {
-		for (i = 0; i < 100; i++) {
-			value = *pPORTFIO & PF2;
-			if (value != 0) {
-				break;
-			}
-			udelay(10000);
-		}
-		printf("\b\b\b%2d ", delay);
-	}
-	if (value != 0)
-		printf("\b\bOK");
-	else {
-		result = -1;
-		printf("\b\bfailed");
-	}
-	printf("\n");
+	puts("\n");
+
 	return result;
 }
diff --git a/board/bf538f-ezkit/config.mk b/board/bf538f-ezkit/config.mk
index bc046f129f..170a2d56db 100644
--- a/board/bf538f-ezkit/config.mk
+++ b/board/bf538f-ezkit/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf538-0.4
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/bf548-ezkit/config.mk b/board/bf548-ezkit/config.mk
index ce96c0d479..ec3c28e0b7 100644
--- a/board/bf548-ezkit/config.mk
+++ b/board/bf548-ezkit/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf548-0.0
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/bf548-ezkit/video.c b/board/bf548-ezkit/video.c
index cde877aa0c..9bcf935568 100644
--- a/board/bf548-ezkit/video.c
+++ b/board/bf548-ezkit/video.c
@@ -153,24 +153,25 @@ void Init_DMA(void *dst)
 {
 
 #if defined(CONFIG_DEB_DMA_URGENT)
-	*pEBIU_DDRQUE |= DEB2_URGENT;
+	bfin_write_EBIU_DDRQUE(bfin_read_EBIU_DDRQUE() | DEB2_URGENT);
 #endif
 
-	*pDMA12_START_ADDR = dst;
+	bfin_write_DMA12_START_ADDR(dst);
 
 	/* X count */
-	*pDMA12_X_COUNT = (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE;
-	*pDMA12_X_MODIFY = DMA_BUS_SIZE / 8;
+	bfin_write_DMA12_X_COUNT((LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE);
+	bfin_write_DMA12_X_MODIFY(DMA_BUS_SIZE / 8);
 
 	/* Y count */
-	*pDMA12_Y_COUNT = LCD_Y_RES;
-	*pDMA12_Y_MODIFY = DMA_BUS_SIZE / 8;
+	bfin_write_DMA12_Y_COUNT(LCD_Y_RES);
+	bfin_write_DMA12_Y_MODIFY(DMA_BUS_SIZE / 8);
 
 	/* DMA Config */
-	*pDMA12_CONFIG =
+	bfin_write_DMA12_CONFIG(
 		WDSIZE_32	|	/* 32 bit DMA */
 		DMA2D 		|	/* 2D DMA */
-		FLOW_AUTO;		/* autobuffer mode */
+		FLOW_AUTO		/* autobuffer mode */
+	);
 }
 
 void Init_Ports(void)
@@ -194,12 +195,12 @@ void Init_Ports(void)
 
 void EnableDMA(void)
 {
-	*pDMA12_CONFIG |= DMAEN;
+	bfin_write_DMA12_CONFIG(bfin_read_DMA12_CONFIG() | DMAEN);
 }
 
 void DisableDMA(void)
 {
-	*pDMA12_CONFIG &= ~DMAEN;
+	bfin_write_DMA12_CONFIG(bfin_read_DMA12_CONFIG() & ~DMAEN);
 }
 
 /* enable and disable PPI functions */
diff --git a/board/bf561-acvilon/config.mk b/board/bf561-acvilon/config.mk
index a90b193388..221de6524f 100644
--- a/board/bf561-acvilon/config.mk
+++ b/board/bf561-acvilon/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf561-0.5
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/bf561-ezkit/config.mk b/board/bf561-ezkit/config.mk
index a90b193388..ff19190a26 100644
--- a/board/bf561-ezkit/config.mk
+++ b/board/bf561-ezkit/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf561-0.3
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/blackstamp/config.mk b/board/blackstamp/config.mk
index eaa09ff795..5035cb9c58 100644
--- a/board/blackstamp/config.mk
+++ b/board/blackstamp/config.mk
@@ -26,5 +26,7 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf532-0.5
+
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/blackvme/Makefile b/board/blackvme/Makefile
new file mode 100644
index 0000000000..f2bd2c247d
--- /dev/null
+++ b/board/blackvme/Makefile
@@ -0,0 +1,54 @@
+#
+# U-boot - Makefile
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS-y	:= $(BOARD).o
+
+SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS-y))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/blackvme/blackvme.c b/board/blackvme/blackvme.c
new file mode 100644
index 0000000000..eccdaf3a48
--- /dev/null
+++ b/board/blackvme/blackvme.c
@@ -0,0 +1,31 @@
+/* U-boot - blackvme.c  board specific routines
+ * (c) Wojtek Skulski 2010 info@skutek.com
+ * Board info: http://www.skutek.com
+ * Copyright (c) 2005-2009 Analog Devices Inc.
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <netdev.h>
+
+int checkboard(void)
+{
+	printf("Board: BlackVME\n");
+	printf("Support: http://www.skutek.com/\n");
+	return 0;
+}
+
+#ifdef CONFIG_DRIVER_AX88180
+/*
+ * The ax88180 driver had to be patched to work around a bug
+ * in Marvell 88E1111 B2 silicon. E-mail me for explanations.
+ */
+int board_eth_init(bd_t *bis)
+{
+	return ax88180_initialize(bis);
+}
+#endif	/* CONFIG_DRIVER_AX88180 */
diff --git a/board/blackvme/config.mk b/board/blackvme/config.mk
new file mode 100644
index 0000000000..8d0fe3934d
--- /dev/null
+++ b/board/blackvme/config.mk
@@ -0,0 +1,32 @@
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+# This is not actually used for Blackfin boards so do not change it
+#TEXT_BASE = do-not-use-me
+
+CONFIG_BFIN_CPU = bf561-0.5
+
+# Set some default LDR flags based on boot mode.
+LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/cm-bf527/cm-bf527.c b/board/cm-bf527/cm-bf527.c
index b6815b1ccd..a5f70a4f83 100644
--- a/board/cm-bf527/cm-bf527.c
+++ b/board/cm-bf527/cm-bf527.c
@@ -13,7 +13,7 @@
 #include <asm/blackfin.h>
 #include <asm/net.h>
 #include <asm/mach-common/bits/otp.h>
-#include "gpio_cfi_flash.h"
+#include "../cm-bf537e/gpio_cfi_flash.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/cm-bf527/config.mk b/board/cm-bf527/config.mk
index 3f9d41f371..78eebff324 100644
--- a/board/cm-bf527/config.mk
+++ b/board/cm-bf527/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf527-0.0
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/cm-bf527/gpio_cfi_flash.c b/board/cm-bf527/gpio_cfi_flash.c
index f8ccc078ec..6e62fff230 100644
--- a/board/cm-bf527/gpio_cfi_flash.c
+++ b/board/cm-bf527/gpio_cfi_flash.c
@@ -1,60 +1,3 @@
-/*
- * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support
- *
- * Copyright (c) 2009 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <common.h>
-#include <asm/blackfin.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include "gpio_cfi_flash.h"
-
-#define GPIO_PIN_1  GPIO_PH9
-#define GPIO_MASK_1 (1 << 21)
-#define GPIO_PIN_2  GPIO_PG11
-#define GPIO_MASK_2 (1 << 22)
-#define GPIO_MASK   (GPIO_MASK_1 | GPIO_MASK_2)
-
-void *gpio_cfi_flash_swizzle(void *vaddr)
-{
-	unsigned long addr = (unsigned long)vaddr;
-
-	gpio_set_value(GPIO_PIN_1, addr & GPIO_MASK_1);
-
-#ifdef GPIO_MASK_2
-	gpio_set_value(GPIO_PIN_2, addr & GPIO_MASK_2);
-#endif
-
-	SSYNC();
-
-	return (void *)(addr & ~GPIO_MASK);
-}
-
-#define __raw_writeq(value, addr) *(volatile u64 *)addr = value
-#define __raw_readq(addr) *(volatile u64 *)addr
-
-#define MAKE_FLASH(size, sfx) \
-void flash_write##size(u##size value, void *addr) \
-{ \
-	__raw_write##sfx(value, gpio_cfi_flash_swizzle(addr)); \
-} \
-u##size flash_read##size(void *addr) \
-{ \
-	return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \
-}
-MAKE_FLASH(8, b)  /* flash_write8()  flash_read8() */
-MAKE_FLASH(16, w) /* flash_write16() flash_read16() */
-MAKE_FLASH(32, l) /* flash_write32() flash_read32() */
-MAKE_FLASH(64, q) /* flash_write64() flash_read64() */
-
-void gpio_cfi_flash_init(void)
-{
-	gpio_request(GPIO_PIN_1, "gpio_cfi_flash");
-#ifdef GPIO_MASK_2
-	gpio_request(GPIO_PIN_2, "gpio_cfi_flash");
-#endif
-	gpio_cfi_flash_swizzle((void *)CONFIG_SYS_FLASH_BASE);
-}
+#define GPIO_PIN_1 GPIO_PH9
+#define GPIO_PIN_2 GPIO_PG11
+#include "../cm-bf537e/gpio_cfi_flash.c"
diff --git a/board/cm-bf527/gpio_cfi_flash.h b/board/cm-bf527/gpio_cfi_flash.h
deleted file mode 100644
index 5211e972ad..0000000000
--- a/board/cm-bf527/gpio_cfi_flash.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support
- *
- * Copyright (c) 2009 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-void *gpio_cfi_flash_swizzle(void *vaddr);
-void gpio_cfi_flash_init(void);
diff --git a/board/cm-bf533/config.mk b/board/cm-bf533/config.mk
index bc046f129f..60ec6b6c14 100644
--- a/board/cm-bf533/config.mk
+++ b/board/cm-bf533/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf533-0.3
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/cm-bf537e/config.mk b/board/cm-bf537e/config.mk
index bc046f129f..1281da4bef 100644
--- a/board/cm-bf537e/config.mk
+++ b/board/cm-bf537e/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf537-0.2
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/cm-bf537e/gpio_cfi_flash.c b/board/cm-bf537e/gpio_cfi_flash.c
index 79ee844135..1075cc4112 100644
--- a/board/cm-bf537e/gpio_cfi_flash.c
+++ b/board/cm-bf537e/gpio_cfi_flash.c
@@ -1,7 +1,7 @@
 /*
  * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support
  *
- * Copyright (c) 2009 Analog Devices Inc.
+ * Copyright (c) 2009-2010 Analog Devices Inc.
  *
  * Licensed under the GPL-2 or later.
  */
@@ -12,9 +12,22 @@
 #include <asm/io.h>
 #include "gpio_cfi_flash.h"
 
+/* Allow this driver to be shared among boards */
+#ifndef GPIO_PIN_1
 #define GPIO_PIN_1  GPIO_PF4
+#endif
 #define GPIO_MASK_1 (1 << 21)
-#define GPIO_MASK   (GPIO_MASK_1)
+#ifndef GPIO_PIN_2
+#define GPIO_MASK_2 (0)
+#else
+#define GPIO_MASK_2 (1 << 22)
+#endif
+#ifndef GPIO_PIN_3
+#define GPIO_MASK_3 (0)
+#else
+#define GPIO_MASK_3 (1 << 23)
+#endif
+#define GPIO_MASK   (GPIO_MASK_1 | GPIO_MASK_2 | GPIO_MASK_3)
 
 void *gpio_cfi_flash_swizzle(void *vaddr)
 {
@@ -22,11 +35,16 @@ void *gpio_cfi_flash_swizzle(void *vaddr)
 
 	gpio_set_value(GPIO_PIN_1, addr & GPIO_MASK_1);
 
-#ifdef GPIO_MASK_2
+#ifdef GPIO_PIN_2
 	gpio_set_value(GPIO_PIN_2, addr & GPIO_MASK_2);
 #endif
 
+#ifdef GPIO_PIN_3
+	gpio_set_value(GPIO_PIN_3, addr & GPIO_MASK_3);
+#endif
+
 	SSYNC();
+	udelay(1);
 
 	return (void *)(addr & ~GPIO_MASK);
 }
@@ -51,8 +69,13 @@ MAKE_FLASH(64, q) /* flash_write64() flash_read64() */
 void gpio_cfi_flash_init(void)
 {
 	gpio_request(GPIO_PIN_1, "gpio_cfi_flash");
-#ifdef GPIO_MASK_2
+	gpio_direction_output(GPIO_PIN_1, 0);
+#ifdef GPIO_PIN_2
 	gpio_request(GPIO_PIN_2, "gpio_cfi_flash");
+	gpio_direction_output(GPIO_PIN_2, 0);
+#endif
+#ifdef GPIO_PIN_3
+	gpio_request(GPIO_PIN_3, "gpio_cfi_flash");
+	gpio_direction_output(GPIO_PIN_3, 0);
 #endif
-	gpio_cfi_flash_swizzle((void *)CONFIG_SYS_FLASH_BASE);
 }
diff --git a/board/cm-bf537u/cm-bf537u.c b/board/cm-bf537u/cm-bf537u.c
index 92fa5a0993..4b7e8642c9 100644
--- a/board/cm-bf537u/cm-bf537u.c
+++ b/board/cm-bf537u/cm-bf537u.c
@@ -13,7 +13,7 @@
 #include <netdev.h>
 #include <asm/blackfin.h>
 #include <asm/net.h>
-#include "gpio_cfi_flash.h"
+#include "../cm-bf537e/gpio_cfi_flash.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/cm-bf537u/config.mk b/board/cm-bf537u/config.mk
index bc046f129f..1281da4bef 100644
--- a/board/cm-bf537u/config.mk
+++ b/board/cm-bf537u/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf537-0.2
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/cm-bf537u/gpio_cfi_flash.c b/board/cm-bf537u/gpio_cfi_flash.c
index 416c689500..ef5ea8b793 100644
--- a/board/cm-bf537u/gpio_cfi_flash.c
+++ b/board/cm-bf537u/gpio_cfi_flash.c
@@ -1,58 +1,2 @@
-/*
- * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support
- *
- * Copyright (c) 2009 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <common.h>
-#include <asm/blackfin.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include "gpio_cfi_flash.h"
-
-#define GPIO_PIN_1  GPIO_PH0
-#define GPIO_MASK_1 (1 << 21)
-#define GPIO_MASK   (GPIO_MASK_1)
-
-void *gpio_cfi_flash_swizzle(void *vaddr)
-{
-	unsigned long addr = (unsigned long)vaddr;
-
-	gpio_set_value(GPIO_PIN_1, addr & GPIO_MASK_1);
-
-#ifdef GPIO_MASK_2
-	gpio_set_value(GPIO_PIN_2, addr & GPIO_MASK_2);
-#endif
-
-	SSYNC();
-
-	return (void *)(addr & ~GPIO_MASK);
-}
-
-#define __raw_writeq(value, addr) *(volatile u64 *)addr = value
-#define __raw_readq(addr) *(volatile u64 *)addr
-
-#define MAKE_FLASH(size, sfx) \
-void flash_write##size(u##size value, void *addr) \
-{ \
-	__raw_write##sfx(value, gpio_cfi_flash_swizzle(addr)); \
-} \
-u##size flash_read##size(void *addr) \
-{ \
-	return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \
-}
-MAKE_FLASH(8, b)  /* flash_write8()  flash_read8() */
-MAKE_FLASH(16, w) /* flash_write16() flash_read16() */
-MAKE_FLASH(32, l) /* flash_write32() flash_read32() */
-MAKE_FLASH(64, q) /* flash_write64() flash_read64() */
-
-void gpio_cfi_flash_init(void)
-{
-	gpio_request(GPIO_PIN_1, "gpio_cfi_flash");
-#ifdef GPIO_MASK_2
-	gpio_request(GPIO_PIN_2, "gpio_cfi_flash");
-#endif
-	gpio_cfi_flash_swizzle((void *)CONFIG_SYS_FLASH_BASE);
-}
+#define GPIO_PIN_1 GPIO_PH0
+#include "../cm-bf537e/gpio_cfi_flash.c"
diff --git a/board/cm-bf537u/gpio_cfi_flash.h b/board/cm-bf537u/gpio_cfi_flash.h
deleted file mode 100644
index 5211e972ad..0000000000
--- a/board/cm-bf537u/gpio_cfi_flash.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support
- *
- * Copyright (c) 2009 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-void *gpio_cfi_flash_swizzle(void *vaddr);
-void gpio_cfi_flash_init(void);
diff --git a/board/cm-bf548/config.mk b/board/cm-bf548/config.mk
index f071a39d75..bce60e5baa 100644
--- a/board/cm-bf548/config.mk
+++ b/board/cm-bf548/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf548-0.0
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/cm-bf548/video.c b/board/cm-bf548/video.c
index c501697404..4703098149 100644
--- a/board/cm-bf548/video.c
+++ b/board/cm-bf548/video.c
@@ -153,25 +153,26 @@ void Init_PPI(void)
 
 void Init_DMA(void *dst)
 {
-
 #if defined(CONFIG_DEB_DMA_URGENT)
-	*pEBIU_DDRQUE |= DEB2_URGENT;
+	bfin_write_EBIU_DDRQUE(bfin_read_EBIU_DDRQUE() | DEB2_URGENT);
 #endif
 
-	*pDMA12_START_ADDR = dst;
+	bfin_write_DMA12_START_ADDR(dst);
 
 	/* X count */
-	*pDMA12_X_COUNT = (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE;
-	*pDMA12_X_MODIFY = DMA_BUS_SIZE / 8;
+	bfin_write_DMA12_X_COUNT((LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE);
+	bfin_write_DMA12_X_MODIFY(DMA_BUS_SIZE / 8);
 
 	/* Y count */
-	*pDMA12_Y_COUNT = LCD_Y_RES;
-	*pDMA12_Y_MODIFY = DMA_BUS_SIZE / 8;
+	bfin_write_DMA12_Y_COUNT(LCD_Y_RES);
+	bfin_write_DMA12_Y_MODIFY(DMA_BUS_SIZE / 8);
 
 	/* DMA Config */
-	*pDMA12_CONFIG = WDSIZE_32 |	/* 32 bit DMA */
+	bfin_write_DMA12_CONFIG(
+	    WDSIZE_32 |	/* 32 bit DMA */
 	    DMA2D |		/* 2D DMA */
-	    FLOW_AUTO;		/* autobuffer mode */
+	    FLOW_AUTO		/* autobuffer mode */
+	);
 }
 
 void Init_Ports(void)
@@ -195,12 +196,12 @@ void Init_Ports(void)
 
 void EnableDMA(void)
 {
-	*pDMA12_CONFIG |= DMAEN;
+	bfin_write_DMA12_CONFIG(bfin_read_DMA12_CONFIG() | DMAEN);
 }
 
 void DisableDMA(void)
 {
-	*pDMA12_CONFIG &= ~DMAEN;
+	bfin_write_DMA12_CONFIG(bfin_read_DMA12_CONFIG() & ~DMAEN);
 }
 
 /* enable and disable PPI functions */
diff --git a/board/cm-bf561/config.mk b/board/cm-bf561/config.mk
index a90b193388..ff19190a26 100644
--- a/board/cm-bf561/config.mk
+++ b/board/cm-bf561/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf561-0.3
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/ibf-dsp561/config.mk b/board/ibf-dsp561/config.mk
index 77c888b3bd..1fec4d020d 100644
--- a/board/ibf-dsp561/config.mk
+++ b/board/ibf-dsp561/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf561-0.5
+
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_PARA := --bits 16
 LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/ip04/config.mk b/board/ip04/config.mk
index 5766829115..683101b827 100644
--- a/board/ip04/config.mk
+++ b/board/ip04/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf532-0.5
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/tcm-bf518/config.mk b/board/tcm-bf518/config.mk
index 3f9d41f371..30b92a3c43 100644
--- a/board/tcm-bf518/config.mk
+++ b/board/tcm-bf518/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf518-0.0
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/tcm-bf537/config.mk b/board/tcm-bf537/config.mk
index bc046f129f..1281da4bef 100644
--- a/board/tcm-bf537/config.mk
+++ b/board/tcm-bf537/config.mk
@@ -26,6 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
+CONFIG_BFIN_CPU = bf537-0.2
+
 CFLAGS_lib += -O2
 CFLAGS_lib/lzma += -O2
 
diff --git a/board/tcm-bf537/gpio_cfi_flash.c b/board/tcm-bf537/gpio_cfi_flash.c
index 08ea7af1fe..c4fef9f5e7 100644
--- a/board/tcm-bf537/gpio_cfi_flash.c
+++ b/board/tcm-bf537/gpio_cfi_flash.c
@@ -1,60 +1,3 @@
-/*
- * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support
- *
- * Copyright (c) 2009 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <common.h>
-#include <asm/blackfin.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include "gpio_cfi_flash.h"
-
-#define GPIO_PIN_1  GPIO_PF4
-#define GPIO_MASK_1 (1 << 21)
-#define GPIO_PIN_2  GPIO_PF5
-#define GPIO_MASK_2 (1 << 22)
-#define GPIO_MASK   (GPIO_MASK_1 | GPIO_MASK_2)
-
-void *gpio_cfi_flash_swizzle(void *vaddr)
-{
-	unsigned long addr = (unsigned long)vaddr;
-
-	gpio_set_value(GPIO_PIN_1, addr & GPIO_MASK_1);
-
-#ifdef GPIO_MASK_2
-	gpio_set_value(GPIO_PIN_2, addr & GPIO_MASK_2);
-#endif
-
-	SSYNC();
-
-	return (void *)(addr & ~GPIO_MASK);
-}
-
-#define __raw_writeq(value, addr) *(volatile u64 *)addr = value
-#define __raw_readq(addr) *(volatile u64 *)addr
-
-#define MAKE_FLASH(size, sfx) \
-void flash_write##size(u##size value, void *addr) \
-{ \
-	__raw_write##sfx(value, gpio_cfi_flash_swizzle(addr)); \
-} \
-u##size flash_read##size(void *addr) \
-{ \
-	return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \
-}
-MAKE_FLASH(8, b)  /* flash_write8()  flash_read8() */
-MAKE_FLASH(16, w) /* flash_write16() flash_read16() */
-MAKE_FLASH(32, l) /* flash_write32() flash_read32() */
-MAKE_FLASH(64, q) /* flash_write64() flash_read64() */
-
-void gpio_cfi_flash_init(void)
-{
-	gpio_request(GPIO_PIN_1, "gpio_cfi_flash");
-#ifdef GPIO_MASK_2
-	gpio_request(GPIO_PIN_2, "gpio_cfi_flash");
-#endif
-	gpio_cfi_flash_swizzle((void *)CONFIG_SYS_FLASH_BASE);
-}
+#define GPIO_PIN_1 GPIO_PF4
+#define GPIO_PIN_2 GPIO_PF5
+#include "../cm-bf537e/gpio_cfi_flash.c"
diff --git a/board/tcm-bf537/gpio_cfi_flash.h b/board/tcm-bf537/gpio_cfi_flash.h
deleted file mode 100644
index 5211e972ad..0000000000
--- a/board/tcm-bf537/gpio_cfi_flash.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support
- *
- * Copyright (c) 2009 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-void *gpio_cfi_flash_swizzle(void *vaddr);
-void gpio_cfi_flash_init(void);
diff --git a/board/tcm-bf537/tcm-bf537.c b/board/tcm-bf537/tcm-bf537.c
index 60742dfea5..04d6bdbd3e 100644
--- a/board/tcm-bf537/tcm-bf537.c
+++ b/board/tcm-bf537/tcm-bf537.c
@@ -13,7 +13,7 @@
 #include <netdev.h>
 #include <asm/blackfin.h>
 #include <asm/net.h>
-#include "gpio_cfi_flash.h"
+#include "../cm-bf537e/gpio_cfi_flash.h"
 
 DECLARE_GLOBAL_DATA_PTR;