diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2015-07-07 11:04:39 +0200 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2015-07-07 11:22:56 +0200 |
| commit | 4529ec182f647fdfe3e84bd6e7c41d8d499c014e (patch) | |
| tree | 6a049f961aadbadc1ae97bb2ab81280825bc44ac /board | |
| parent | fc69db24720b0d5aed7b04a70ddc56a0162cb7f5 (diff) | |
colibri_vf: mux UART2 (Colibri UART_B) at boot time
Some firmwares running on the secondary core rely on UART pins
muxed at start time. Mux the Vybrid UART2 (which maps to Colibri
UART_B) at startup.
Diffstat (limited to 'board')
| -rw-r--r-- | board/toradex/colibri_vf/colibri_vf.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index 0c3d8fe2195..e9e28ce6ea3 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -103,6 +103,10 @@ static void setup_iomux_uart(void) NEW_PAD_CTRL(VF610_PAD_PTB5__UART1_RX, UART_PAD_CTRL), NEW_PAD_CTRL(VF610_PAD_PTB10__UART0_TX, UART_PAD_CTRL), NEW_PAD_CTRL(VF610_PAD_PTB11__UART0_RX, UART_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTD0__UART2_TX, UART_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTD1__UART2_RX, UART_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTD2__UART2_RTS, UART_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTD3__UART2_CTS, UART_PAD_CTRL), }; imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); @@ -272,7 +276,7 @@ static void clock_init(void) u32 pfd_clk_sel, ddr_clk_sel; clrsetbits_le32(&ccm->ccgr0, CCM_REG_CTRL_MASK, - CCM_CCGR0_UART0_CTRL_MASK); + CCM_CCGR0_UART0_CTRL_MASK | CCM_CCGR0_UART2_CTRL_MASK); clrsetbits_le32(&ccm->ccgr1, CCM_REG_CTRL_MASK, CCM_CCGR1_PIT_CTRL_MASK | CCM_CCGR1_WDOGA5_CTRL_MASK | CCM_CCGR1_USBC0_CTRL_MASK); |