diff options
author | Simon Glass <sjg@chromium.org> | 2011-11-29 16:25:06 -0800 |
---|---|---|
committer | Gerrit <chrome-bot@google.com> | 2011-12-01 12:48:50 -0800 |
commit | 8d1c7cb54d17a831c8063e27a5187ca30f8d4874 (patch) | |
tree | fb8a7590c108199938cbed6fcb3767eb5aa872b3 /board | |
parent | e48f5d4d14f2e84593d262063b05797bc328dc83 (diff) |
tegra: Add PLLP clock setting to fdt
This adds a setting for the required PLLP clock frequency.
BUG=chromium-os:23496
TEST=build and boot on Seaboard, T33, Kaen
Change-Id: I02ab35fcd496d4ac4cfa6b732fdd9a9b7eb2cc88
Reviewed-on: https://gerrit.chromium.org/gerrit/12242
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board')
-rw-r--r-- | board/nvidia/cardhu/tegra30.dtsi | 13 | ||||
-rw-r--r-- | board/nvidia/seaboard/tegra250.dtsi | 13 |
2 files changed, 26 insertions, 0 deletions
diff --git a/board/nvidia/cardhu/tegra30.dtsi b/board/nvidia/cardhu/tegra30.dtsi index 7b29f0b3176..1f88d40eb1d 100644 --- a/board/nvidia/cardhu/tegra30.dtsi +++ b/board/nvidia/cardhu/tegra30.dtsi @@ -20,6 +20,19 @@ }; }; + pllp: clock0 { + compatible = "nvidia,tegra20-pll-sys"; + #clock-cells = <1>; + clock-frequency = <408000000>; + clock-output-names = "pllp"; + }; + + /* TBD: provides an easy way to find clocks for now */ + clocks { + compatible = "board-clocks"; + pllp = <&pllp>; + }; + gpio: gpio@6000d000 { compatible = "nvidia,tegra250-gpio", "ns16550"; reg = < 0x6000d000 0x1000 >; diff --git a/board/nvidia/seaboard/tegra250.dtsi b/board/nvidia/seaboard/tegra250.dtsi index 62c6c7774d9..4a35d53ddde 100644 --- a/board/nvidia/seaboard/tegra250.dtsi +++ b/board/nvidia/seaboard/tegra250.dtsi @@ -20,6 +20,19 @@ }; }; + pllp: clock0 { + compatible = "nvidia,tegra20-pll-sys"; + #clock-cells = <1>; + clock-frequency = <216000000>; + clock-output-names = "pllp"; + }; + + /* TBD: provides an easy way to find clocks for now */ + clocks { + compatible = "board-clocks"; + pllp = <&pllp>; + }; + gpio: gpio@6000d000 { compatible = "nvidia,tegra250-gpio", "ns16550"; reg = < 0x6000d000 0x1000 >; |