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authorChe-Liang Chiou <clchiou@chromium.org>2011-05-17 16:38:43 +0800
committerSimon Glass <sjg@chromium.org>2011-08-29 10:39:21 -0700
commit184c00514414ba6ba7ee63e6fe4dae144e863c07 (patch)
tree46fe53d2185badb17293e4f71b8006fde8daa20f /board
parentbb65b8624b4bf86617a50edfcba635de45494ba7 (diff)
Get hwid from GBB and correct write-protect GPIO polarity
BUG=none TEST=[ $(crossystem wpsw_boot) = 1 ] && [ crossystem hwid = "$HWID_YOU_ASSIGNED" ] Cherry-pick: 5f30788 Change-Id: Id29b56748fafc6ad64cd336207ac7ef43befbbf5 Reviewed-on: http://gerrit.chromium.org/gerrit/1004 Reviewed-by: Rong Chang <rongchang@chromium.org> Tested-by: Che-Liang Chiou <clchiou@chromium.org>
Diffstat (limited to 'board')
-rw-r--r--board/nvidia/chromeos/gpio.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/board/nvidia/chromeos/gpio.c b/board/nvidia/chromeos/gpio.c
index 64a93f4a9b2..f662b92f383 100644
--- a/board/nvidia/chromeos/gpio.c
+++ b/board/nvidia/chromeos/gpio.c
@@ -52,15 +52,15 @@
int is_firmware_write_protect_gpio_asserted(void)
{
- GPIO_ACCESSOR(TEGRA_GPIO_PH3, GPIO_ACTIVE_LOW)
+ GPIO_ACCESSOR(TEGRA_GPIO_PH3, GPIO_ACTIVE_HIGH);
}
int is_recovery_mode_gpio_asserted(void)
{
- GPIO_ACCESSOR(TEGRA_GPIO_PH0, GPIO_ACTIVE_LOW)
+ GPIO_ACCESSOR(TEGRA_GPIO_PH0, GPIO_ACTIVE_LOW);
}
int is_developer_mode_gpio_asserted(void)
{
- GPIO_ACCESSOR(TEGRA_GPIO_PV0, GPIO_ACTIVE_HIGH)
+ GPIO_ACCESSOR(TEGRA_GPIO_PV0, GPIO_ACTIVE_HIGH);
}