add device trees for stumpy, lumpy and mario.

factor out common parts.

BUG=none
TEST=none

Change-Id: If050cc130c417065436474281fc0ab39823a156c
Reviewed-on: http://gerrit.chromium.org/gerrit/6189
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>

8 files changed, 104 insertions, 25 deletions

diff --git a/board/chromebook-x86/coreboot/alex.dts b/board/chromebook-x86/coreboot/alex.dts
index 5d3aeca3a2a..8d68ef01189 100644
--- a/board/chromebook-x86/coreboot/alex.dts
+++ b/board/chromebook-x86/coreboot/alex.dts
@@ -1,38 +1,15 @@
 /dts-v1/;
 
+/include/ "skeleton.dtsi"
 /include/ "flashmap-4mb.dtsi"
+/include/ "oxpcie.dtsi"
 
 / {
-        #address-cells = <1>;
-        #size-cells = <1>;
 	model = "Google Alex";
 	compatible = "google,alex", "intel,atom-pineview";
 
-	chromeos-config {
-		twostop;                /* Two-stop boot */
-		twostop-optional;       /* One-stop optimization enabled */
-	};
-
 	config {
 	       silent_console = <0>;
 	       hwid = "X86 ALEX TEST 9769";
 	};
-
-	aliases {
-		console = "/serial@e0401000";
-	};
-
-	serial@e0401000 {
-		compatible = "ns16550";
-		reg = <0xe0401000 0x40>;
-		id = <1>;
-		reg-shift = <1>;
-		baudrate = <115200>;
-		clock-frequency = <4000000>;
-		multiplier = <1>;
-		status = "ok";
-	};
-
-        chosen { };
-        memory { device_type = "memory"; reg = <0 0>; };
 };
diff --git a/board/chromebook-x86/coreboot/flashmap-4mb.dtsi b/board/chromebook-x86/coreboot/flashmap-4mb.dtsi
index bbaaa0f2596..881c9b74607 100644
--- a/board/chromebook-x86/coreboot/flashmap-4mb.dtsi
+++ b/board/chromebook-x86/coreboot/flashmap-4mb.dtsi
@@ -5,6 +5,12 @@
  */
 
 / {
+	/* ChromeOS specific configuration for this flashmap */
+	chromeos-config {
+		twostop;                /* Two-stop boot */
+		twostop-optional;       /* One-stop optimization enabled */
+	};
+
 	/*
 	 * Names will be capitalized and hyphen converted to underscore by
 	 * cros_bundle_firmware.
diff --git a/board/chromebook-x86/coreboot/iouart.dtsi b/board/chromebook-x86/coreboot/iouart.dtsi
new file mode 100644
index 00000000000..2f299ff4634
--- /dev/null
+++ b/board/chromebook-x86/coreboot/iouart.dtsi
@@ -0,0 +1,19 @@
+/* Classical IO mapped 16550 UART */
+
+/{
+	aliases {
+		console = "/serial@3f8";
+	};
+
+	serial@3f8 {
+		compatible = "ns16550";
+		reg = <0x3f8 0x08>;
+		id = <1>;
+		reg-shift = <1>;
+		baudrate = <115200>;
+		clock-frequency = <115200>;
+		multiplier = <1>;
+		io-mapped = <1>;
+		status = "ok";
+	};
+};
diff --git a/board/chromebook-x86/coreboot/lumpy.dts b/board/chromebook-x86/coreboot/lumpy.dts
new file mode 100644
index 00000000000..928b00f7407
--- /dev/null
+++ b/board/chromebook-x86/coreboot/lumpy.dts
@@ -0,0 +1,15 @@
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+/include/ "flashmap-4mb.dtsi"
+/include/ "oxpcie.dtsi"
+
+/ {
+	model = "Google Lumpy";
+	compatible = "google,lumpy", "intel,celeron-sandybridge";
+
+	config {
+	       silent_console = <0>;
+	       hwid = "X86 LUMPY TEST 6638";
+	};
+};
diff --git a/board/chromebook-x86/coreboot/mario.dts b/board/chromebook-x86/coreboot/mario.dts
new file mode 100644
index 00000000000..c0b16213411
--- /dev/null
+++ b/board/chromebook-x86/coreboot/mario.dts
@@ -0,0 +1,15 @@
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+/include/ "flashmap-4mb.dtsi"
+/include/ "oxpcie.dtsi"
+
+/ {
+	model = "Google Mario";
+	compatible = "google,mario", "intel,atom-pineview";
+
+	config {
+	       silent_console = <0>;
+	       hwid = "X86 MARIO TEST 1089";
+	};
+};
diff --git a/board/chromebook-x86/coreboot/oxpcie.dtsi b/board/chromebook-x86/coreboot/oxpcie.dtsi
new file mode 100644
index 00000000000..001203c8b83
--- /dev/null
+++ b/board/chromebook-x86/coreboot/oxpcie.dtsi
@@ -0,0 +1,19 @@
+/* OXPCIe 952 UART */
+
+/ {
+	aliases {
+		console = "/serial@e0401000";
+	};
+
+	serial@e0401000 {
+		compatible = "ns16550";
+		reg = <0xe0401000 0x40>;
+		id = <1>;
+		reg-shift = <1>;
+		baudrate = <115200>;
+		clock-frequency = <4000000>;
+		multiplier = <1>;
+		status = "ok";
+	};
+};
+
diff --git a/board/chromebook-x86/coreboot/skeleton.dtsi b/board/chromebook-x86/coreboot/skeleton.dtsi
new file mode 100644
index 00000000000..f6a08b05490
--- /dev/null
+++ b/board/chromebook-x86/coreboot/skeleton.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Skeleton device tree; the bare minimum needed to boot; just include and
+ * add a compatible value.  The bootloader will typically populate the memory
+ * node.
+ */
+
+/ {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        chosen { };
+	aliases { };
+        memory { device_type = "memory"; reg = <0 0>; };
+};
diff --git a/board/chromebook-x86/coreboot/stumpy.dts b/board/chromebook-x86/coreboot/stumpy.dts
new file mode 100644
index 00000000000..39aed50d4af
--- /dev/null
+++ b/board/chromebook-x86/coreboot/stumpy.dts
@@ -0,0 +1,15 @@
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+/include/ "flashmap-4mb.dtsi"
+/include/ "iouart.dtsi"
+
+/ {
+	model = "Google Stumpy";
+	compatible = "google,stumpy", "intel,celeron-sandybridge";
+
+	config {
+	       silent_console = <0>;
+	       hwid = "X86 STUMPY TEST 0128";
+	};
+};