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authorIan Ray <ian.ray@ge.com>2019-01-31 16:21:17 +0200
committerStefano Babic <sbabic@denx.de>2019-04-13 20:30:08 +0200
commit31c9afdd92380c6a1902325f322d2c4ba52d0ba2 (patch)
tree77cc206bd71eb713ada2f570196f27a076638dd2 /board
parent3cc0e327f2489ae7b3ff05d80efc768e1b4fb58f (diff)
board: ge: ppd: Enable CONFIG_DM_MMC
Use MMC device model, and remove USDHC pin configuration code since the pinctrl driver is used. Signed-off-by: Ian Ray <ian.ray@ge.com>
Diffstat (limited to 'board')
-rw-r--r--board/ge/mx53ppd/mx53ppd.c73
1 files changed, 0 insertions, 73 deletions
diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c
index 23bfe55541..9e13a24755 100644
--- a/board/ge/mx53ppd/mx53ppd.c
+++ b/board/ge/mx53ppd/mx53ppd.c
@@ -122,79 +122,6 @@ static void setup_iomux_fec(void)
imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
}
-#ifdef CONFIG_FSL_ESDHC
-struct fsl_esdhc_cfg esdhc_cfg[2] = {
- {MMC_SDHC3_BASE_ADDR},
- {MMC_SDHC1_BASE_ADDR},
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- return 1;
-}
-
-#define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
- PAD_CTL_PUS_100K_UP)
-#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \
- PAD_CTL_DSE_HIGH)
-
-int board_mmc_init(bd_t *bis)
-{
- static const iomux_v3_cfg_t sd1_pads[] = {
- NEW_PAD_CTRL(MX53_PAD_PATA_RESET_B__ESDHC3_CMD,
- SD_CMD_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_PATA_IORDY__ESDHC3_CLK, SD_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_PATA_DATA8__ESDHC3_DAT0, SD_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_PATA_DATA9__ESDHC3_DAT1, SD_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_PATA_DATA10__ESDHC3_DAT2, SD_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_PATA_DATA11__ESDHC3_DAT3, SD_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_PATA_DATA0__ESDHC3_DAT4, SD_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_PATA_DATA1__ESDHC3_DAT5, SD_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_PATA_DATA2__ESDHC3_DAT6, SD_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_PATA_DATA3__ESDHC3_DAT7, SD_PAD_CTRL),
- MX53_PAD_EIM_DA11__GPIO3_11,
- };
-
- static const iomux_v3_cfg_t sd2_pads[] = {
- NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, SD_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0, SD_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1, SD_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2, SD_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3, SD_PAD_CTRL),
- MX53_PAD_EIM_DA13__GPIO3_13,
- };
-
- u32 index;
- int ret;
-
- esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
- esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
-
- for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
- switch (index) {
- case 0:
- imx_iomux_v3_setup_multiple_pads(sd1_pads,
- ARRAY_SIZE(sd1_pads));
- break;
- case 1:
- imx_iomux_v3_setup_multiple_pads(sd2_pads,
- ARRAY_SIZE(sd2_pads));
- break;
- default:
- printf("Warning: you configured more ESDHC controller (%d) as supported by the board(2)\n",
- CONFIG_SYS_FSL_ESDHC_NUM);
- return -EINVAL;
- }
- ret = fsl_esdhc_initialize(bis, &esdhc_cfg[index]);
- if (ret)
- return ret;
- }
-
- return 0;
-}
-#endif
-
#define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \
PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)