powerpc: remove RPXsuper board support

Enough time has passed since this board was moved to Orphan. Remove.

 - Remove board/rpxsuper/*
 - Remove include/configs/RPXsuper.h
 - Move the entry from boards.cfg to doc/README.scrapyard

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

6 files changed, 0 insertions, 875 deletions

diff --git a/board/rpxsuper/Makefile b/board/rpxsuper/Makefile
deleted file mode 100644
index 239b419ab2c..00000000000
--- a/board/rpxsuper/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	:= rpxsuper.o flash.o mii_phy.o
diff --git a/board/rpxsuper/flash.c b/board/rpxsuper/flash.c
deleted file mode 100644
index 24bcd7c0a3f..00000000000
--- a/board/rpxsuper/flash.c
+++ /dev/null
@@ -1,416 +0,0 @@
-/*
- * (C) Copyright 2000
- * Marius Groeger <mgroeger@sysgo.de>
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Flash Routines for AMD 29F080B devices
- * Added support for 64bit and AMD 29DL323B
- *
- *--------------------------------------------------------------------
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <asm/io.h>
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-#define RD_SWP32(x) in_le32((volatile u32*)x)
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init(void)
-{
-	int i;
-
-	/* Init: no FLASHes known */
-	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i)
-		flash_info[i].flash_id = FLASH_UNKNOWN;
-
-	/* for now, only support the 4 MB Flash SIMM */
-	(void)flash_get_size((vu_long *) CONFIG_SYS_FLASH0_BASE,
-			      &flash_info[0]);
-
-	/*
-	 * protect monitor and environment sectors
-	 */
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH0_BASE
-	flash_protect(FLAG_PROTECT_SET,
-		      CONFIG_SYS_MONITOR_BASE,
-		      CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
-		      &flash_info[0]);
-#endif
-
-#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
-#ifndef CONFIG_ENV_SIZE
-#define CONFIG_ENV_SIZE	CONFIG_ENV_SECT_SIZE
-#endif
-	flash_protect(FLAG_PROTECT_SET,
-		      CONFIG_ENV_ADDR,
-		      CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
-#endif
-
-	return CONFIG_SYS_FLASH0_SIZE * 1024 * 1024;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info  (flash_info_t *info)
-{
-    int i;
-
-    if (info->flash_id == FLASH_UNKNOWN) {
-	printf ("missing or unknown FLASH type\n");
-	return;
-    }
-
-    switch (info->flash_id & FLASH_VENDMASK) {
-    case (AMD_MANUFACT & FLASH_VENDMASK):
-	printf ("AMD ");
-	break;
-    case (FUJ_MANUFACT & FLASH_VENDMASK):
-	printf ("FUJITSU ");
-	break;
-    case (SST_MANUFACT & FLASH_VENDMASK):
-	printf ("SST ");
-	break;
-    default:
-	printf ("Unknown Vendor ");
-	break;
-    }
-
-    switch (info->flash_id & FLASH_TYPEMASK) {
-    case (AMD_ID_DL323B & FLASH_TYPEMASK):
-	printf("AM29DL323B (32 MBit)\n");
-	break;
-    default:
-	printf ("Unknown Chip Type\n");
-	break;
-    }
-
-    printf ("  Size: %ld MB in %d Sectors\n",
-	    info->size >> 20, info->sector_count);
-
-    printf ("  Sector Start Addresses:");
-    for (i = 0; i < info->sector_count; ++i) {
-	if ((i % 5) == 0) printf ("\n   ");
-	printf (" %08lX%s",
-		info->start[i],
-		info->protect[i] ? " (RO)" : "     "
-		);
-    }
-    printf ("\n");
-    return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
-    short i;
-    vu_long vendor[2], devid[2];
-    ulong base = (ulong)addr;
-
-    /* Reset and Write auto select command: read Manufacturer ID */
-    addr[0] = 0xf0f0f0f0;
-    addr[2 * 0x0555] = 0xAAAAAAAA;
-    addr[2 * 0x02AA] = 0x55555555;
-    addr[2 * 0x0555] = 0x90909090;
-    addr[1] = 0xf0f0f0f0;
-    addr[2 * 0x0555 + 1] = 0xAAAAAAAA;
-    addr[2 * 0x02AA + 1] = 0x55555555;
-    addr[2 * 0x0555 + 1] = 0x90909090;
-    udelay (1000);
-
-    vendor[0] = RD_SWP32(&addr[0]);
-    vendor[1] = RD_SWP32(&addr[1]);
-    if (vendor[0] != vendor[1] || vendor[0] != AMD_MANUFACT) {
-	info->size = 0;
-	goto out;
-    }
-
-    devid[0] = RD_SWP32(&addr[2]);
-    devid[1] = RD_SWP32(&addr[3]);
-
-    if (devid[0] == AMD_ID_DL323B) {
-	/*
-	* we have 2 Banks
-	* Bank 1 (23 Sectors): 0-7=8kbyte, 8-22=64kbyte
-	* Bank 2 (48 Sectors): 23-70=64kbyte
-	*/
-	info->flash_id     = (AMD_MANUFACT & FLASH_VENDMASK) |
-			     (AMD_ID_DL323B & FLASH_TYPEMASK);
-	info->sector_count = 71;
-	info->size         = 4 * (8 * 8 + 63 * 64) * 1024;
-    }
-    else {
-	info->size = 0;
-	goto out;
-    }
-
-    /* set up sector start address table */
-    for (i = 0; i < 8; i++) {
-	info->start[i] = base + (i * 0x8000);
-    }
-    for (i = 8; i < info->sector_count; i++) {
-	info->start[i] = base + (i * 0x40000) + 8 * 0x8000 - 8 * 0x40000;
-    }
-
-    /* check for protected sectors */
-    for (i = 0; i < info->sector_count; i++) {
-	/* read sector protection at sector address */
-	addr = (volatile unsigned long *)(info->start[i]);
-	addr[2 * 0x0555] = 0xAAAAAAAA;
-	addr[2 * 0x02AA] = 0x55555555;
-	addr[2 * 0x0555] = 0x90909090;
-	addr[2 * 0x0555 + 1] = 0xAAAAAAAA;
-	addr[2 * 0x02AA + 1] = 0x55555555;
-	addr[2 * 0x0555 + 1] = 0x90909090;
-	udelay (1000);
-	base = RD_SWP32(&addr[4]);
-	base |= RD_SWP32(&addr[5]);
-	info->protect[i] = base & 0x00010001 ? 1 : 0;
-    }
-    addr = (vu_long*)info->start[0];
-
-out:
-    /* reset command */
-    addr[0] = 0xf0f0f0f0;
-    addr[1] = 0xf0f0f0f0;
-
-    return info->size;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
-    vu_long *addr = (vu_long*)(info->start[0]);
-    int flag, prot, sect, l_sect;
-    ulong start, now, last;
-
-    if ((s_first < 0) || (s_first > s_last)) {
-	if (info->flash_id == FLASH_UNKNOWN) {
-	    printf ("- missing\n");
-	} else {
-	    printf ("- no sectors to erase\n");
-	}
-	return 1;
-    }
-
-    prot = 0;
-    for (sect = s_first; sect <= s_last; sect++) {
-	if (info->protect[sect]) {
-	    prot++;
-	}
-    }
-
-    if (prot) {
-	printf ("- Warning: %d protected sectors will not be erased!\n",
-		prot);
-    } else {
-	printf ("\n");
-    }
-
-    l_sect = -1;
-
-    /* Disable interrupts which might cause a timeout here */
-    flag = disable_interrupts();
-
-    addr[2 * 0x0555] = 0xAAAAAAAA;
-    addr[2 * 0x02AA] = 0x55555555;
-    addr[2 * 0x0555] = 0x80808080;
-    addr[2 * 0x0555] = 0xAAAAAAAA;
-    addr[2 * 0x02AA] = 0x55555555;
-    addr[2 * 0x0555 + 1] = 0xAAAAAAAA;
-    addr[2 * 0x02AA + 1] = 0x55555555;
-    addr[2 * 0x0555 + 1] = 0x80808080;
-    addr[2 * 0x0555 + 1] = 0xAAAAAAAA;
-    addr[2 * 0x02AA + 1] = 0x55555555;
-    udelay (100);
-
-    /* Start erase on unprotected sectors */
-    for (sect = s_first; sect<=s_last; sect++) {
-	if (info->protect[sect] == 0) {	/* not protected */
-	    addr = (vu_long*)(info->start[sect]);
-	    addr[0] = 0x30303030;
-	    addr[1] = 0x30303030;
-	    l_sect = sect;
-	}
-    }
-
-    /* re-enable interrupts if necessary */
-    if (flag)
-      enable_interrupts();
-
-    /* wait at least 80us - let's wait 1 ms */
-    udelay (1000);
-
-    /*
-     * We wait for the last triggered sector
-     */
-    if (l_sect < 0)
-      goto DONE;
-
-    start = get_timer (0);
-    last  = start;
-    addr = (vu_long*)(info->start[l_sect]);
-    while (	(addr[0] & 0x80808080) != 0x80808080 ||
-		(addr[1] & 0x80808080) != 0x80808080) {
-	if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
-	    printf ("Timeout\n");
-	    return 1;
-	}
-	/* show that we're waiting */
-	if ((now - last) > 1000) {	/* every second */
-	    serial_putc ('.');
-	    last = now;
-	}
-    }
-
-    DONE:
-    /* reset to read mode */
-    addr = (volatile unsigned long *)info->start[0];
-    addr[0] = 0xF0F0F0F0;	/* reset bank */
-    addr[1] = 0xF0F0F0F0;	/* reset bank */
-
-    printf (" done\n");
-    return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
-    ulong cp, wp, data;
-    int i, l, rc;
-
-    wp = (addr & ~3);	/* get lower word aligned address */
-
-    /*
-     * handle unaligned start bytes
-     */
-    if ((l = addr - wp) != 0) {
-	data = 0;
-	for (i=0, cp=wp; i<l; ++i, ++cp) {
-	    data = (data << 8) | (*(uchar *)cp);
-	}
-	for (; i<4 && cnt>0; ++i) {
-	    data = (data << 8) | *src++;
-	    --cnt;
-	    ++cp;
-	}
-	for (; cnt==0 && i<4; ++i, ++cp) {
-	    data = (data << 8) | (*(uchar *)cp);
-	}
-
-	if ((rc = write_word(info, wp, data)) != 0) {
-	    return (rc);
-	}
-	wp += 4;
-    }
-
-    /*
-     * handle word aligned part
-     */
-    while (cnt >= 4) {
-	data = 0;
-	for (i=0; i<4; ++i) {
-	    data = (data << 8) | *src++;
-	}
-	if ((rc = write_word(info, wp, data)) != 0) {
-	    return (rc);
-	}
-	wp  += 4;
-	cnt -= 4;
-    }
-
-    if (cnt == 0) {
-	return (0);
-    }
-
-    /*
-     * handle unaligned tail bytes
-     */
-    data = 0;
-    for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
-	data = (data << 8) | *src++;
-	--cnt;
-    }
-    for (; i<4; ++i, ++cp) {
-	data = (data << 8) | (*(uchar *)cp);
-    }
-
-    return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
-    vu_long *addr = (vu_long*)(info->start[0]);
-    ulong start;
-    int flag;
-
-    /* Check if Flash is (sufficiently) erased */
-    if ((*((vu_long *)dest) & data) != data) {
-	return (2);
-    }
-    /* Disable interrupts which might cause a timeout here */
-    flag = disable_interrupts();
-
-    if ((dest & 0x00000004) == 0) {
-	addr[2 * 0x0555] = 0xAAAAAAAA;
-	addr[2 * 0x02AA] = 0x55555555;
-	addr[2 * 0x0555] = 0xA0A0A0A0;
-    }
-    else {
-	addr[2 * 0x0555 + 1] = 0xAAAAAAAA;
-	addr[2 * 0x02AA + 1] = 0x55555555;
-	addr[2 * 0x0555 + 1] = 0xA0A0A0A0;
-    }
-
-    *((vu_long *)dest) = data;
-
-    /* re-enable interrupts if necessary */
-    if (flag)
-      enable_interrupts();
-
-    /* data polling for D7 */
-    start = get_timer (0);
-    while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) {
-	if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-	    return (1);
-	}
-    }
-    return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/rpxsuper/mii_phy.c b/board/rpxsuper/mii_phy.c
deleted file mode 100644
index 12e23f487f4..00000000000
--- a/board/rpxsuper/mii_phy.c
+++ /dev/null
@@ -1,107 +0,0 @@
-#include <common.h>
-#include <mii_phy.h>
-#include "rpxsuper.h"
-
-#define MII_MDIO	0x01
-#define MII_MDCK	0x02
-#define MII_MDIR	0x04
-
-void
-mii_discover_phy(void)
-{
-    int known;
-    unsigned short phy_reg;
-    unsigned long phy_id;
-
-    known = 0;
-    printf("Discovering phy @ 0: ");
-    phy_id = mii_phy_read(2) << 16;
-    phy_id |= mii_phy_read(3);
-    if ((phy_id & 0xFFFFFC00) == 0x00137800) {
-	printf("Level One ");
-	if ((phy_id & 0x000003F0) == 0xE0) {
-	    printf("LXT971A Revision %d\n", (int)(phy_id & 0xF));
-	    known = 1;
-	}
-	else printf("unknown type\n");
-    }
-    else printf("unknown OUI = 0x%08lX\n", phy_id);
-
-    phy_reg = mii_phy_read(1);
-    if (!(phy_reg & 0x0004)) printf("Link is down\n");
-    if (!(phy_reg & 0x0020)) printf("Auto-negotiation not complete\n");
-    if (phy_reg & 0x0002) printf("Jabber condition detected\n");
-    if (phy_reg & 0x0010) printf("Remote fault condition detected \n");
-
-    if (known) {
-	phy_reg = mii_phy_read(17);
-	if (phy_reg & 0x0400)
-	    printf("Phy operating at %d MBit/s in %s-duplex mode\n",
-		phy_reg & 0x4000 ? 100 : 10,
-		phy_reg & 0x0200 ? "full" : "half");
-	else
-	    printf("bad link!!\n");
-/*
-left  off: no link, green 100MBit, yellow 10MBit
-right off: no activity, green full-duplex, yellow half-duplex
-*/
-	mii_phy_write(20, 0x0452);
-    }
-}
-
-unsigned short
-mii_phy_read(unsigned short reg)
-{
-    int i;
-    unsigned short tmp, val = 0, adr = 0;
-    t_rpx_regs *regs = (t_rpx_regs*)CONFIG_SYS_REGS_BASE;
-
-    tmp = 0x6002 | (adr << 7) | (reg << 2);
-    regs->bcsr4 = 0xC3;
-    for (i = 0; i < 64; i++) {
-	regs->bcsr4 ^= MII_MDCK;
-    }
-    for (i = 0; i < 16; i++) {
-	regs->bcsr4 &= ~MII_MDCK;
-	if (tmp & 0x8000) regs->bcsr4 |= MII_MDIO;
-	else regs->bcsr4 &= ~MII_MDIO;
-	regs->bcsr4 |= MII_MDCK;
-	tmp <<= 1;
-    }
-    regs->bcsr4 |= MII_MDIR;
-    for (i = 0; i < 16; i++) {
-	val <<= 1;
-	regs->bcsr4 = MII_MDIO | (regs->bcsr4 | MII_MDCK);
-	if (regs->bcsr4 & MII_MDIO) val |= 1;
-	regs->bcsr4 = MII_MDIO | (regs->bcsr4 &= ~MII_MDCK);
-    }
-    return val;
-}
-
-void
-mii_phy_write(unsigned short reg, unsigned short val)
-{
-    int i;
-    unsigned short tmp, adr = 0;
-    t_rpx_regs *regs = (t_rpx_regs*)CONFIG_SYS_REGS_BASE;
-
-    tmp = 0x5002 | (adr << 7) | (reg << 2);
-    regs->bcsr4 = 0xC3;
-    for (i = 0; i < 64; i++) {
-	regs->bcsr4 ^= MII_MDCK;
-    }
-    for (i = 0; i < 16; i++) {
-	regs->bcsr4 &= ~MII_MDCK;
-	if (tmp & 0x8000) regs->bcsr4 |= MII_MDIO;
-	else regs->bcsr4 &= ~MII_MDIO;
-	regs->bcsr4 |= MII_MDCK;
-	tmp <<= 1;
-    }
-    for (i = 0; i < 16; i++) {
-	regs->bcsr4 &= ~MII_MDCK;
-	if (val & 0x8000) regs->bcsr4 |= MII_MDIO;
-	else regs->bcsr4 &= ~MII_MDIO;
-	regs->bcsr4 |= MII_MDCK;
-	val <<= 1;
-    }
-}
diff --git a/board/rpxsuper/readme b/board/rpxsuper/readme
deleted file mode 100644
index 21267bdd8ca..00000000000
--- a/board/rpxsuper/readme
+++ /dev/null
@@ -1,30 +0,0 @@
-Hi,
-
-so this is the port to the Embedded Planet RPX Super Board.
-
-ATTENTION
-This code is only tested on the AY-Version, which is an early release with some
-hardware bugs. The main problem is that this board uses the default Hard Reset
-Configuration Word and not the 4 bytes located at start of FLASH because at
-0xFE000000 is no FLASH. The FLASH consists out of 4 chips each 16bits wide. Be
-carefull, the bytes are swapped. So DQ0-7 is the high byte, DQ8-15 ist the low
-byte.
-
-The icache can only manually be enabled after reset.
-The FLASH and main SDRAM is working with icache enabled.
-The local SDRAM can only be used as data memory when icache is enabled.
-If U-Boot runs in local SDRAM, TFTP does not work.
-The functions in mii_phy.c are all working. Call mii_phy_discover() out of
-eth_init() and solve the linker error.
-I2C, RTC/NVRAM and PCMCIA are not working yet.
-
-TODO
-The 32MB local SDRAM is working but not shown in the startup messages of
-U-Boot. If you locate U-Boot or any other program to this area it won't run.
-Turning the ichache off does not solve this problem.
-
-As I won't buy another RPX Super there might be some little work to do for you
-getting this U-Boot port running on the final board.
-
-
-frank.morauf@salzbrenner.com
diff --git a/board/rpxsuper/rpxsuper.c b/board/rpxsuper/rpxsuper.c
deleted file mode 100644
index dc558707faa..00000000000
--- a/board/rpxsuper/rpxsuper.c
+++ /dev/null
@@ -1,289 +0,0 @@
-/*
- * (C) Copyright 2000
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2001
- * Advent Networks, Inc. <http://www.adventnetworks.com>
- * Jay Monkman <jtm@smoothsmoothie.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include "rpxsuper.h"
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
-    /* Port A configuration */
-    {	/*	      conf ppar psor pdir podr pdat */
-	/* PA31 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 *ATMTXEN */
-	/* PA30 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMTCA   */
-	/* PA29 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMTSOC  */
-	/* PA28 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 *ATMRXEN */
-	/* PA27 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMRSOC */
-	/* PA26 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMRCA */
-	/* PA25 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMTXD[0] */
-	/* PA24 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMTXD[1] */
-	/* PA23 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMTXD[2] */
-	/* PA22 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMTXD[3] */
-	/* PA21 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMTXD[4] */
-	/* PA20 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMTXD[5] */
-	/* PA19 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMTXD[6] */
-	/* PA18 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMTXD[7] */
-	/* PA17 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMRXD[7] */
-	/* PA16 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMRXD[6] */
-	/* PA15 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMRXD[5] */
-	/* PA14 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMRXD[4] */
-	/* PA13 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMRXD[3] */
-	/* PA12 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMRXD[2] */
-	/* PA11 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMRXD[1] */
-	/* PA10 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMRXD[0] */
-	/* PA9  */ {   1,   1,   0,   1,   0,   0   }, /* SMC2 TXD */
-	/* PA8  */ {   1,   1,   0,   0,   0,   0   }, /* SMC2 RXD */
-	/* PA7  */ {   1,   0,   0,   0,   0,   0   }, /* PA7 */
-	/* PA6  */ {   1,   0,   0,   0,   0,   0   }, /* PA6 */
-	/* PA5  */ {   1,   0,   0,   0,   0,   0   }, /* PA5 */
-	/* PA4  */ {   1,   0,   0,   0,   0,   0   }, /* PA4 */
-	/* PA3  */ {   1,   0,   0,   0,   0,   0   }, /* PA3 */
-	/* PA2  */ {   1,   0,   0,   0,   0,   0   }, /* PA2 */
-	/* PA1  */ {   1,   0,   0,   0,   0,   0   }, /* PA1 */
-	/* PA0  */ {   1,   0,   0,   0,   0,   0   }  /* PA0 */
-    },
-
-    /* Port B configuration */
-    {   /*	      conf ppar psor pdir podr pdat */
-	/* PB31 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TX_ER */
-	/* PB30 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RX_DV */
-	/* PB29 */ {   1,   1,   1,   1,   0,   0   }, /* FCC2 MII TX_EN */
-	/* PB28 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RX_ER */
-	/* PB27 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII COL */
-	/* PB26 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII CRS */
-	/* PB25 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[3] */
-	/* PB24 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[2] */
-	/* PB23 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[1] */
-	/* PB22 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[0] */
-	/* PB21 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[0] */
-	/* PB20 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[1] */
-	/* PB19 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[2] */
-	/* PB18 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[3] */
-	/* PB17 */ {   1,   1,   0,   0,   0,   0   }, /* FCC3 MII RX_DV */
-	/* PB16 */ {   1,   1,   0,   0,   0,   0   }, /* FCC3 MII RX_ER */
-	/* PB15 */ {   1,   1,   0,   1,   0,   0   }, /* FCC3 MII TX_ER */
-	/* PB14 */ {   1,   1,   0,   1,   0,   0   }, /* FCC3 MII TX_EN */
-	/* PB13 */ {   1,   1,   0,   0,   0,   0   }, /* FCC3 MII COL */
-	/* PB12 */ {   1,   1,   0,   0,   0,   0   }, /* FCC3 MII CRS */
-	/* PB11 */ {   1,   1,   0,   0,   0,   0   }, /* FCC3 MII RxD[3] */
-	/* PB10 */ {   1,   1,   0,   0,   0,   0   }, /* FCC3 MII RxD[2] */
-	/* PB9  */ {   1,   1,   0,   0,   0,   0   }, /* FCC3 MII RxD[1] */
-	/* PB8  */ {   1,   1,   0,   0,   0,   0   }, /* FCC3 MII RxD[0] */
-	/* PB7  */ {   0,   0,   0,   0,   0,   0   }, /* PB7 */
-	/* PB6  */ {   1,   1,   0,   1,   0,   0   }, /* FCC3 MII TxD[1] */
-	/* PB5  */ {   1,   1,   0,   1,   0,   0   }, /* FCC3 MII TxD[2] */
-	/* PB4  */ {   1,   1,   0,   1,   0,   0   }, /* FCC3 MII TxD[3] */
-	/* PB3  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
-	/* PB2  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
-	/* PB1  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
-	/* PB0  */ {   0,   0,   0,   0,   0,   0   }  /* pin doesn't exist */
-    },
-
-    /* Port C */
-    {   /*	      conf ppar psor pdir podr pdat */
-	/* PC31 */ {   1,   0,   0,   1,   0,   0   }, /* PC31 */
-	/* PC30 */ {   1,   0,   0,   1,   0,   0   }, /* PC30 */
-	/* PC29 */ {   1,   1,   1,   0,   0,   0   }, /* SCC1 EN *CLSN */
-	/* PC28 */ {   1,   0,   0,   1,   0,   0   }, /* PC28 */
-	/* PC27 */ {   1,   1,   0,   1,   0,   0   }, /* FCC3 MII TxD[0] */
-	/* PC26 */ {   1,   0,   0,   1,   0,   0   }, /* PC26 */
-	/* PC25 */ {   1,   0,   0,   1,   0,   0   }, /* PC25 */
-	/* PC24 */ {   1,   0,   0,   1,   0,   0   }, /* PC24 */
-	/* PC23 */ {   1,   1,   0,   1,   0,   0   }, /* ATMTFCLK */
-	/* PC22 */ {   1,   1,   0,   0,   0,   0   }, /* ATMRFCLK */
-	/* PC21 */ {   1,   1,   0,   0,   0,   0   }, /* SCC1 EN RXCLK */
-	/* PC20 */ {   1,   1,   0,   0,   0,   0   }, /* SCC1 EN TXCLK */
-	/* PC19 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RX_CLK */
-	/* PC18 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII TX_CLK */
-	/* PC17 */ {   1,   1,   0,   0,   0,   0   }, /* FCC3 MII RX_CLK */
-	/* PC16 */ {   1,   1,   0,   0,   0,   0   }, /* FCC3 MII TX_CLK */
-	/* PC15 */ {   1,   0,   0,   0,   0,   0   }, /* PC15 */
-	/* PC14 */ {   1,   1,   0,   0,   0,   0   }, /* SCC1 EN *CD */
-	/* PC13 */ {   1,   0,   0,   1,   0,   0   }, /* PC13 */
-	/* PC12 */ {   1,   0,   0,   1,   0,   0   }, /* PC12 */
-	/* PC11 */ {   1,   0,   0,   1,   0,   0   }, /* PC11 */
-	/* PC10 */ {   1,   0,   0,   1,   0,   0   }, /* FCC2 MDC */
-	/* PC9  */ {   1,   0,   0,   1,   0,   0   }, /* FCC2 MDIO */
-	/* PC8  */ {   1,   0,   0,   1,   0,   0   }, /* PC8 */
-	/* PC7  */ {   1,   0,   0,   1,   0,   0   }, /* PC7 */
-	/* PC6  */ {   1,   0,   0,   1,   0,   0   }, /* PC6 */
-	/* PC5  */ {   1,   0,   0,   1,   0,   0   }, /* PC5 */
-	/* PC4  */ {   1,   0,   0,   1,   0,   0   }, /* PC4 */
-	/* PC3  */ {   1,   0,   0,   1,   0,   0   }, /* PC3 */
-	/* PC2  */ {   1,   0,   0,   1,   0,   1   }, /* ENET FDE */
-	/* PC1  */ {   1,   0,   0,   1,   0,   0   }, /* ENET DSQE */
-	/* PC0  */ {   1,   0,   0,   1,   0,   0   }, /* ENET LBK */
-    },
-
-    /* Port D */
-    {   /*	      conf ppar psor pdir podr pdat */
-	/* PD31 */ {   1,   0,   0,   0,   0,   0   }, /* SCC1 EN RxD */
-	/* PD30 */ {   1,   0,   0,   0,   0,   0   }, /* SCC1 EN TxD */
-	/* PD29 */ {   1,   0,   0,   0,   0,   0   }, /* SCC1 EN TENA */
-	/* PD28 */ {   1,   0,   0,   0,   0,   0   }, /* PD28 */
-	/* PD27 */ {   1,   0,   0,   0,   0,   0   }, /* PD27 */
-	/* PD26 */ {   1,   0,   0,   0,   0,   0   }, /* PD26 */
-	/* PD25 */ {   1,   0,   0,   0,   0,   0   }, /* PD25 */
-	/* PD24 */ {   1,   0,   0,   0,   0,   0   }, /* PD24 */
-	/* PD23 */ {   1,   0,   0,   0,   0,   0   }, /* PD23 */
-	/* PD22 */ {   1,   0,   0,   0,   0,   0   }, /* PD22 */
-	/* PD21 */ {   1,   0,   0,   0,   0,   0   }, /* PD21 */
-	/* PD20 */ {   1,   0,   0,   0,   0,   0   }, /* PD20 */
-	/* PD19 */ {   1,   0,   0,   0,   0,   0   }, /* PD19 */
-	/* PD18 */ {   1,   0,   0,   0,   0,   0   }, /* PD19 */
-	/* PD17 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMRXPRTY */
-	/* PD16 */ {   1,   0,   0,   0,   0,   0   }, /* FCC1 ATMTXPRTY */
-	/* PD15 */ {   1,   1,   1,   0,   1,   0   }, /* I2C SDA */
-	/* PD14 */ {   1,   1,   1,   0,   1,   0   }, /* I2C SCL */
-	/* PD13 */ {   1,   0,   0,   0,   0,   0   }, /* PD13 */
-	/* PD12 */ {   1,   0,   0,   0,   0,   0   }, /* PD12 */
-	/* PD11 */ {   1,   0,   0,   0,   0,   0   }, /* PD11 */
-	/* PD10 */ {   1,   0,   0,   0,   0,   0   }, /* PD10 */
-	/* PD9  */ {   1,   1,   0,   1,   0,   0   }, /* SMC1 TXD */
-	/* PD8  */ {   1,   1,   0,   0,   0,   0   }, /* SMC1 RXD */
-	/* PD7  */ {   1,   0,   0,   0,   0,   0   }, /* PD7 */
-	/* PD6  */ {   1,   0,   0,   0,   0,   0   }, /* PD6 */
-	/* PD5  */ {   1,   0,   0,   0,   0,   0   }, /* PD5 */
-	/* PD4  */ {   1,   0,   0,   0,   0,   0   }, /* PD4 */
-	/* PD3  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
-	/* PD2  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
-	/* PD1  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
-	/* PD0  */ {   0,   0,   0,   0,   0,   0   }  /* pin doesn't exist */
-    }
-};
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Setup CS4 to enable the Board Control/Status registers.
- * Otherwise the smcs won't work.
-*/
-int board_early_init_f (void)
-{
-    volatile t_rpx_regs *regs = (t_rpx_regs*)CONFIG_SYS_REGS_BASE;
-    volatile immap_t *immap  = (immap_t *)CONFIG_SYS_IMMR;
-    volatile memctl8260_t *memctl = &immap->im_memctl;
-    memctl->memc_br4 = CONFIG_SYS_BR4_PRELIM;
-    memctl->memc_or4 = CONFIG_SYS_OR4_PRELIM;
-    regs->bcsr1 = 0x70; /* to enable terminal no SMC1 */
-    regs->bcsr2 = 0x20;	/* mut be written to enable writing FLASH */
-    return 0;
-}
-
-void
-reset_phy(void)
-{
-    volatile t_rpx_regs *regs = (t_rpx_regs*)CONFIG_SYS_REGS_BASE;
-    regs->bcsr4 = 0xC3;
-}
-
-/*
- * Check Board Identity:
- */
-
-int checkboard(void)
-{
-    volatile t_rpx_regs *regs = (t_rpx_regs*)CONFIG_SYS_REGS_BASE;
-    printf ("Board: Embedded Planet RPX Super, Revision %d\n",
-	regs->bcsr0 >> 4);
-
-    return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-phys_size_t initdram(int board_type)
-{
-    volatile immap_t *immap  = (immap_t *)CONFIG_SYS_IMMR;
-    volatile memctl8260_t *memctl = &immap->im_memctl;
-    volatile uchar c = 0, *ramaddr;
-    ulong psdmr, lsdmr, bcr;
-    long size = 0;
-    int i;
-
-    psdmr = CONFIG_SYS_PSDMR;
-    lsdmr = CONFIG_SYS_LSDMR;
-
-    /*
-     * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
-     *
-     * "At system reset, initialization software must set up the
-     *  programmable parameters in the memory controller banks registers
-     *  (ORx, BRx, P/LSDMR). After all memory parameters are configured,
-     *  system software should execute the following initialization sequence
-     *  for each SDRAM device.
-     *
-     *  1. Issue a PRECHARGE-ALL-BANKS command
-     *  2. Issue eight CBR REFRESH commands
-     *  3. Issue a MODE-SET command to initialize the mode register
-     *
-     *  The initial commands are executed by setting P/LSDMR[OP] and
-     *  accessing the SDRAM with a single-byte transaction."
-     *
-     * The appropriate BRx/ORx registers have already been set when we
-     * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE.
-     */
-
-    size = CONFIG_SYS_SDRAM0_SIZE;
-    bcr = immap->im_siu_conf.sc_bcr;
-    immap->im_siu_conf.sc_bcr = (bcr & ~BCR_EBM);
-
-    memctl->memc_mptpr = CONFIG_SYS_MPTPR;
-
-    ramaddr = (uchar *)(CONFIG_SYS_SDRAM0_BASE);
-    memctl->memc_psrt = CONFIG_SYS_PSRT;
-
-    memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
-    *ramaddr = c;
-
-    memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR;
-    for (i = 0; i < 8; i++)
-	*ramaddr = c;
-
-    memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;
-    *ramaddr = c;
-
-    memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN;
-    *ramaddr = c;
-
-    immap->im_siu_conf.sc_bcr = bcr;
-
-#ifndef CONFIG_SYS_RAMBOOT
-/*    size += CONFIG_SYS_SDRAM1_SIZE; */
-    ramaddr = (uchar *)(CONFIG_SYS_SDRAM1_BASE);
-    memctl->memc_lsrt = CONFIG_SYS_LSRT;
-
-    memctl->memc_lsdmr = lsdmr | PSDMR_OP_PREA;
-    *ramaddr = c;
-
-    memctl->memc_lsdmr = lsdmr | PSDMR_OP_CBRR;
-    for (i = 0; i < 8; i++)
-	*ramaddr = c;
-
-    memctl->memc_lsdmr = lsdmr | PSDMR_OP_MRW;
-    *ramaddr = c;
-
-    memctl->memc_lsdmr = lsdmr | PSDMR_OP_NORM | PSDMR_RFEN;
-    *ramaddr = c;
-#endif
-
-    /* return total ram size */
-    return (size * 1024 * 1024);
-}
diff --git a/board/rpxsuper/rpxsuper.h b/board/rpxsuper/rpxsuper.h
deleted file mode 100644
index af31060a7be..00000000000
--- a/board/rpxsuper/rpxsuper.h
+++ /dev/null
@@ -1,25 +0,0 @@
-#ifndef __RPX8260_H__
-#define __RPX8260_H__
-
-typedef struct tt_rpx_regs
-{
-    volatile unsigned char bcsr0;
-    volatile unsigned char bcsr1;
-    volatile unsigned char bcsr2;
-    volatile unsigned char bcsr3;
-    volatile unsigned char bcsr4;
-    volatile unsigned char bcsr5;
-    volatile unsigned char bcsr6;
-    volatile unsigned char bcsr7;
-    volatile unsigned char bcsr8;
-    volatile unsigned char bcsr9;
-    volatile unsigned char bcsr10;
-    volatile unsigned char bcsr11;
-    volatile unsigned char bcsr12;
-    volatile unsigned char bcsr13;
-    volatile unsigned char bcsr14;
-    volatile unsigned char bcsr15;
-} t_rpx_regs;
-typedef t_rpx_regs* tp_rpx_regs;
-
-#endif