diff options
author | Ye Li <ye.li@nxp.com> | 2020-11-18 19:09:20 -0800 |
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committer | Ye Li <ye.li@nxp.com> | 2020-11-18 21:44:18 -0800 |
commit | f26fb27be9a349f065bf19056cffe6bfe2b06f28 (patch) | |
tree | d3396dc4dae8c7d19fd9b4bf9e63ba62c5c0f9ca /board | |
parent | ce4ac958be9393d01e63bfeddb43e58db929c24e (diff) |
LF-2769-2 mx6sxsabresd: Reserve top 1MB DDR for RPMSG usage
To avoid u-boot MMU table overlap M4 RPMSG vring buffer. Reserve
the top 1MB DDR when bootaux is enabled.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 44cf26781117c484e5f7e46fe6008c0b31c297e4)
Diffstat (limited to 'board')
-rw-r--r-- | board/freescale/mx6sxsabresd/mx6sxsabresd.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 035c1414b3e..8d66a704d33 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -554,6 +554,14 @@ int board_early_init_f(void) return 0; } +#ifdef CONFIG_IMX_BOOTAUX +ulong board_get_usable_ram_top(ulong total_size) +{ + /* Reserve top 1M memory used by M core vring/buffer */ + return gd->ram_top - SZ_1M; +} +#endif + static struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR, 0, 4}, {USDHC3_BASE_ADDR}, |