diff options
author | Sekhar Nori <nsekhar@ti.com> | 2009-07-14 11:44:32 +0530 |
---|---|---|
committer | Justin Waters <justin.waters@timesys.com> | 2009-09-09 14:03:28 -0400 |
commit | eea473d268548ffb8524bd41d0acce2acc2b2ec7 (patch) | |
tree | 3dae7cbf49935d9b0752eb035cde70870dd6d422 /board | |
parent | abb838f96548117d418bca72f566fe1763b4da6c (diff) |
u-boot: da850/omap-l138: include provision to wake up DSP.
DSP is woken-up by default on DA850/OMAP-L138.
To prevent DSP from being woken up, set the environment variable
dspwake to no.
Diffstat (limited to 'board')
-rw-r--r-- | board/da8xx/da8xx-evm/da830.c | 19 | ||||
-rw-r--r-- | board/da8xx/da8xx-evm/da850.c | 41 |
2 files changed, 39 insertions, 21 deletions
diff --git a/board/da8xx/da8xx-evm/da830.c b/board/da8xx/da8xx-evm/da830.c index 716caf65df2..7268384a94b 100644 --- a/board/da8xx/da8xx-evm/da830.c +++ b/board/da8xx/da8xx-evm/da830.c @@ -40,8 +40,7 @@ DECLARE_GLOBAL_DATA_PTR; extern void timer_init(void); extern int eth_hw_init(void); -/* Works on Always On power domain only (no PD argument) */ -void lpsc_on(unsigned int id) +void lpsc_on(unsigned domain, unsigned int id) { dv_reg_p mdstat, mdctl, ptstat, ptcmd; @@ -61,16 +60,16 @@ void lpsc_on(unsigned int id) ptcmd = REG_P(PSC1_PTCMD); } - while (*ptstat & 0x01) {;} + while (*ptstat & (0x1 << domain)) {;} if ((*mdstat & 0x1f) == 0x03) return; /* Already on and enabled */ *mdctl |= 0x03; - *ptcmd = 0x01; + *ptcmd = 0x01 << domain; - while (*ptstat & 0x01) {;} + while (*ptstat & (0x1 << domain)) {;} while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */ } @@ -122,11 +121,11 @@ int board_init(void) * assuming here that the DSP bootloader has set the IOPU * such that PSC access is available to ARM */ - lpsc_on(DAVINCI_LPSC_AEMIF); /* NAND, NOR */ - lpsc_on(DAVINCI_LPSC_SPI0); /* Serial Flash */ - lpsc_on(DAVINCI_LPSC_EMAC); /* image download */ - lpsc_on(DAVINCI_LPSC_UART2); /* console */ - lpsc_on(DAVINCI_LPSC_GPIO); + lpsc_on(0, DAVINCI_LPSC_AEMIF); /* NAND, NOR */ + lpsc_on(0, DAVINCI_LPSC_SPI0); /* Serial Flash */ + lpsc_on(0, DAVINCI_LPSC_EMAC); /* image download */ + lpsc_on(0, DAVINCI_LPSC_UART2); /* console */ + lpsc_on(0, DAVINCI_LPSC_GPIO); /* Pin Muxing support */ diff --git a/board/da8xx/da8xx-evm/da850.c b/board/da8xx/da8xx-evm/da850.c index 9702e3f368a..ccc464d1241 100644 --- a/board/da8xx/da8xx-evm/da850.c +++ b/board/da8xx/da8xx-evm/da850.c @@ -44,8 +44,7 @@ DECLARE_GLOBAL_DATA_PTR; extern void timer_init(void); extern int eth_hw_init(void); -/* Works on Always On power domain only (no PD argument) */ -void lpsc_on(unsigned int id) +void lpsc_on(unsigned domain, unsigned int id) { dv_reg_p mdstat, mdctl, ptstat, ptcmd; @@ -53,7 +52,7 @@ void lpsc_on(unsigned int id) return; if(id < 32) { - mdstat = REG_P(PSC0_MDSTAT + (id * 4)); + mdstat = REG_P(PSC0_MDSTAT + (id * 4)); mdctl = REG_P(PSC0_MDCTL + (id * 4)); ptstat = REG_P(PSC0_PTSTAT); ptcmd = REG_P(PSC0_PTCMD); @@ -65,16 +64,16 @@ void lpsc_on(unsigned int id) ptcmd = REG_P(PSC1_PTCMD); } - while (*ptstat & 0x01) {;} + while (*ptstat & (0x1 << domain)) {;} if ((*mdstat & 0x1f) == 0x03) return; /* Already on and enabled */ *mdctl |= 0x03; - *ptcmd = 0x01; + *ptcmd = 0x1 << domain; - while (*ptstat & 0x01) {;} + while (*ptstat & (0x1 << domain)) {;} while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */ } @@ -126,11 +125,11 @@ int board_init(void) * assuming here that the DSP bootloader has set the IOPU * such that PSC access is available to ARM */ - lpsc_on(DAVINCI_LPSC_AEMIF); /* NAND, NOR */ - lpsc_on(DAVINCI_LPSC_SPI1); /* Serial Flash */ - lpsc_on(DAVINCI_LPSC_EMAC); /* image download */ - lpsc_on(DAVINCI_LPSC_UART2); /* console */ - lpsc_on(DAVINCI_LPSC_GPIO); + lpsc_on(0, DAVINCI_LPSC_AEMIF); /* NAND, NOR */ + lpsc_on(0, DAVINCI_LPSC_SPI1); /* Serial Flash */ + lpsc_on(0, DAVINCI_LPSC_EMAC); /* image download */ + lpsc_on(0, DAVINCI_LPSC_UART2); /* console */ + lpsc_on(0, DAVINCI_LPSC_GPIO); /* Pin Muxing support */ @@ -234,6 +233,24 @@ err_probe: return ret; } +static void dspwake() +{ + unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE; + + if (!strcmp(getenv("dspwake"), "no")) + return; + + *resetvect++ = 0x1E000; /* DSP Idle */ + /* clear out the next 10 words as NOP */ + memset(resetvect, 0, sizeof(unsigned) * 10); + + /* setup the DSP reset vector */ + REG(HOST1CFG) = DAVINCI_L3CBARAM_BASE; + + lpsc_on(1, DAVINCI_LPSC_GEM); + REG(PSC0_MDCTL + (15 * 4)) |= 0x100; +} + int misc_init_r (void) { u_int8_t tmp[20], addr[10]; @@ -259,6 +276,8 @@ int misc_init_r (void) printf("Error: Ethernet init failed!\n"); } + dspwake(); + return(0); } |