summaryrefslogtreecommitdiff
path: root/board/xpedite1k
diff options
context:
space:
mode:
authorwdenk <wdenk>2004-02-22 23:46:08 +0000
committerwdenk <wdenk>2004-02-22 23:46:08 +0000
commit3c74e32a98187c792edcea3e0e39150de5a8dda6 (patch)
treefeb1a080a1332a3bfc383282ba9a6e4cfe6f8f4a /board/xpedite1k
parentcf56e1101957c09cb4aafcf28a89658c4649c511 (diff)
* Patch by Travis Sawyer, 09 Feb 2004:
o 440GX: - Fix PCI Indirect access for type 1 config cycles with ppc440. - Add phymode for 440 enet - fix pci pre init o XPedite1K: - Change board_pre_init to board_early_init_f - Add user flash to bus controller setup - Fix pci pre init - Fix is_pci_host to check GPIO for monarch bit - Force xpedite1k to pci conventional mode (via #define option) * Patch by Brad Kemp, 4 Feb 2004: - handle the machine check that is generated during the PCI scans on 82xx processors. - define the registers used in the IMMR by the PCI subsystem. * Patch by Pierre Aubert, 03 Feb 2004: cpu/mpc5xxx/start.S: copy MBAR into SPR311 * Patch by Jeff Angielski, 03 Feb 2004: Fix copy & paste error in cpu/mpc8260/pci.c * Patch by Reinhard Meyer, 24 Jan 2004: Fix typo in cpu/mpc5xxx/pci_mpc5200.c
Diffstat (limited to 'board/xpedite1k')
-rw-r--r--board/xpedite1k/config.mk4
-rw-r--r--board/xpedite1k/xpedite1k.c27
2 files changed, 15 insertions, 16 deletions
diff --git a/board/xpedite1k/config.mk b/board/xpedite1k/config.mk
index c0f0da84eed..e42b273a41b 100644
--- a/board/xpedite1k/config.mk
+++ b/board/xpedite1k/config.mk
@@ -22,11 +22,9 @@
#
#
-# esd ADCIOP boards
+# XES XPedite1000 PPC440GX
#
-#TEXT_BASE = 0xFFFE0000
-
ifeq ($(ramsym),1)
TEXT_BASE = 0x07FD0000
else
diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
index c025c85db84..d6b30b94466 100644
--- a/board/xpedite1k/xpedite1k.c
+++ b/board/xpedite1k/xpedite1k.c
@@ -32,7 +32,7 @@
long int fixed_sdram (void);
-int board_pre_init (void)
+int board_early_init_f(void)
{
unsigned long sdrreg;
/* TBS: Setup the GPIO access for the user LEDs */
@@ -51,6 +51,8 @@ int board_pre_init (void)
/* set the bus controller */
mtebc (pb0ap, 0x04055200); /* FLASH/SRAM */
mtebc (pb0cr, 0xfff18000); /* BAS=0xfff 1MB R/W 8-bit */
+ mtebc (pb1ap, 0x04055200); /* FLASH/SRAM */
+ mtebc (pb1cr, 0xfe098000); /* BAS=0xff8 16MB R/W 8-bit */
/*--------------------------------------------------------------------
* Setup the interrupt controller polarities, triggers, etc.
@@ -217,17 +219,18 @@ long int fixed_sdram (void)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
-
- /*--------------------------------------------------------------------------+
- * TBS:
- * The xpedite1k is a PrPMC board, however for our purposes it is the host
- *--------------------------------------------------------------------------*/
- strap = mfdcr(cpc0_strp1);
- if( (strap & 0x00100000) == 0 ){
- printf("PCI: CPC0_STRP1[PAE] not set.\n");
- return 0;
+ /* See if we're supposed to setup the pci */
+ mfsdr(sdr_sdstp1, strap);
+ if ((strap & 0x00010000) == 0) {
+ return (0);
}
+#if defined(CFG_PCI_FORCE_PCI_CONV)
+ /* Setup System Device Register PCIX0_XCR */
+ mfsdr(sdr_xcr, strap);
+ strap &= 0x0f000000;
+ mtsdr(sdr_xcr, strap);
+#endif
return 1;
}
#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
@@ -292,9 +295,7 @@ void pci_target_init(struct pci_controller * hose )
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
- /* The ebony board is always configured as host. */
- /* TBS: The xpedite1k is not necessarily the host, however for our purposes, it is. */
- return(1);
+ return ((in32(CFG_GPIO_BASE + 0x1C) & 0x00000800) == 0);
}
#endif /* defined(CONFIG_PCI) */